Good morning,
We are evaluating the use of the VNF1048. During the test phase the problem arose that despite the MOS being in the open state we detect a current flow, even if minimal, that for our application must be avoided.
From our point of view this behavior is due to the current coming from the "OUT" pin.
Reading the datasheet in fact, this pin provides a bypass current that could be deactivated via SPI by setting bit 3, reported below, of the CR1 register.
However, this does not reflect what happens during testing, in fact despite setting this bit to '0', the behavior of the e-fuse remains unchanged and a minimum current (1mA circa).
Is there a way to command the EFUSE in a complete open (high impedance) state?
Hi Peter,
Thanks for the quick reply.
We’ve verified and addressed the point you suggested. We're able to disable the bypass with the bit you suggested; however, the issue is that there is always a "leakage output current" flowing into our load (as shown in the image below, approximately 250 µA).
Our goal is to command the EFUSE to completely open the output stage, even when a load is always connected—similar to how a high-side switch operates.
Do you know if this is possible with this device?
