Error in ST Official Documentation: Mislabeling of Phase and Neutral in Schematic and Potential Issues with Grounding and Voltage Regulation

[Mhamza_Nasir]

There appears to be an error in the official documentation of ST, specifically relating to the incorrect labeling of Phase and Neutral in their schematic. The image provided demonstrates how the capacitance-based power supply is powered via the Neutral wire, however, this contradicts the datasheet for the STPMS2, which designates Pin 8 as the VIP (Phase input) and Pin 7 as the VIN (Neutral input). In the schematic, the Phase wire is connected to Pin 7 and the Neutral wire is connected to Pin 8, which is not possible, and the IC is being powered via the Neutral wire. Additionally, the placement of the voltage regulator header for the STLQ015 appears to be incorrect. Furthermore, in the capacitance-based power supply, it is unclear where the ground for the STLQ015 IC is derived from, as AC and DC grounds cannot be connected together. It is requested that ST review and rectify these apparent mistakes in their official documentation, Another aspect that I would like to clarify is the activation of the enable pin of STQL015 by simply connecting a 1uF capacitor. Suppose when a phase is connected in a capacitance-based supply, the neutral or ground side of the circuit, where the cathode of the Zener and SMAJ is connected, always gives us 0V. The STQL015 documentation states that to turn on the voltage regulator, a voltage greater than 1.4V must be provided. How is it possible to turn on the regulator under these conditions? If there is an explanation for this discrepancy, please let me know. Thank you.

[Peter BENSCH · Accepted solution]

Welcome, @Mhamza_Nasir​, to the community!

First of all: P and N in VIP/VIN at U8...U10 do not stand for Phase and Neutral, but for Positive and Negative, and therefore only refer to the phase of the measured signal.

The GND symbols on the Sigma-Delta modulators U8...U10 should indeed have been labelled separately in the same way as above for the capacitor power supplies, where GND1, GND2 and GND3 are indicated respectively.

Now it may be clearer that the three areas of the circuit, which are also separated by vertical lines, have only exactly one galvanic connection with NEUTRAL. All three capacitive power supplies thus have NEUTRAL as a common input, while the opposite pole is the respective phase, i.e. GND1/2/3.

Finally, the enable pin of the STLQ015 is connected to VIN (pin 1) of the STLQ015 via a zero-ohm resistor and thus activates the STLQ015. If you redraw the circuit of the capacitive power supply, you will see that C14/15/16 is in parallel to D7/8/9, EN is at the input and the respective output pin is connected to VCC1/2/3 via P6/7/8.

We are very sorry that the schematics of the EVALSTPM-3PHISO is a little misleading and should indeed be better drawn, e.g. by not only adding the names for the different GNDs, but also the pin numbers at U2...U10.

Does this answer your questions?

Regards

/Peter

@Cristiana SCARAMEL​

[Mhamza_Nasir]

Thank you for your response. I have made necessary corrections to the circuit by accurately labeling the capacitance-based power supply that is powered with positive phase. Following the redesign, I have simulated the circuit and observed that the enable pin of the STLQ015 regulator must receive <VIN+0.3v on its EN pin for proper functioning. According to documentation, this voltage cannot be sourced from the neutral side, which is why I propose to connect it in parallel with the VIN or positive side of the circuit to enable and supply voltages to the Input pin and EN pins of the regulator simultaneously. I would appreciate your feedback on whether this is the correct approach or if there is a better method to achieve this.

And finally, with reference to Picture 2, the circuit has been redesigned as shown after making the necessary corrections. If you notice any issues with this design, please let me know. Additionally, I would appreciate your expert opinion on whether it is necessary to include a ferrite bead in the circuit along with the line and neutral, given that I am using a shunt. Your valuable insights would be greatly appreciated. Thank you

[Peter BENSCH]

In a 3-phase system the shunt is typically inserted in the phases, so in the EVALSTPM-3PHISO the supply of the capacitive power supplies was implemented via the neutral conductor. The STLQ015 does not care if it gets its input voltage from phase or if it gets it "upside down" from neutral. 

Otherwise, I don't really understand why you redesigned the circuit, because that is unnecessary for a 3-phase system.

Regards

/Peter

[Mhamza_Nasir]

Indeed, my intention is to create a product that functions solely in single phase. As such, I have taken the liberty of redesigning the circuit to reflect this goal

[Peter BENSCH]

OK, great.

If the problem is solved, please mark this thread as answered by selecting Select as best, as also explained here. This will help other users find that answer faster.

Good luck!

/Peter