Reboot and stuck in the LSM6DSO

[JXiao.1]

I am using LSM6DSO sensor to get step and two interrupts. When the sensor runs about 15 minutes, it will stop working and have no reaction. Sometimes it will reboot and the step reset to zero.

This is my code for initializing the sensor, is there something wrong or I need to add something?

{
	lsm6dso_device_id_get(&imu_dev_ctx, &whoamI);
	if(whoamI != LSM6DSO_ID)
		return false;
 
	lsm6dso_reset_set(&imu_dev_ctx, PROPERTY_ENABLE);
	do
	{
		lsm6dso_reset_get(&imu_dev_ctx, &rst);
	}while(rst);
 
	lsm6dso_i3c_disable_set(&imu_dev_ctx, LSM6DSO_I3C_DISABLE);
 
	lsm6dso_xl_full_scale_set(&imu_dev_ctx, LSM6DSO_2g);
	lsm6dso_gy_full_scale_set(&imu_dev_ctx, LSM6DSO_250dps);
	lsm6dso_block_data_update_set(&imu_dev_ctx, PROPERTY_ENABLE);
 
	lsm6dso_fifo_watermark_set(&imu_dev_ctx, PATTERN_LEN);
	lsm6dso_fifo_stop_on_wtm_set(&imu_dev_ctx, PROPERTY_ENABLE);
 
	lsm6dso_fifo_mode_set(&imu_dev_ctx, LSM6DSO_STREAM_TO_FIFO_MODE);
 
	lsm6dso_fifo_xl_batch_set(&imu_dev_ctx, LSM6DSO_XL_BATCHED_AT_104Hz);
	lsm6dso_fifo_gy_batch_set(&imu_dev_ctx, LSM6DSO_GY_BATCHED_AT_104Hz);
 
	lsm6dso_xl_data_rate_set(&imu_dev_ctx, LSM6DSO_XL_ODR_104Hz);
	lsm6dso_gy_data_rate_set(&imu_dev_ctx, LSM6DSO_GY_ODR_104Hz);
 
	lsm6dso_xl_power_mode_set(&imu_dev_ctx, LSM6DSO_LOW_NORMAL_POWER_MD);
 
	lsm6dso_tap_detection_on_z_set(&imu_dev_ctx, PROPERTY_ENABLE);
	lsm6dso_tap_detection_on_y_set(&imu_dev_ctx, PROPERTY_ENABLE);
	lsm6dso_tap_detection_on_x_set(&imu_dev_ctx, PROPERTY_ENABLE);
 
	lsm6dso_tap_threshold_x_set(&imu_dev_ctx, 0x12);
	lsm6dso_tap_threshold_y_set(&imu_dev_ctx, 0x12);
	lsm6dso_tap_threshold_z_set(&imu_dev_ctx, 0x12);
 
	lsm6dso_tap_quiet_set(&imu_dev_ctx, 0x03);
	lsm6dso_tap_shock_set(&imu_dev_ctx, 0x03);
 
	lsm6dso_tap_mode_set(&imu_dev_ctx, LSM6DSO_ONLY_SINGLE);
 
	lsm6dso_****_sens_set(&imu_dev_ctx, LSM6DSO_****_BASE_MODE);
 
	lsm6dso_int_notification_set(&imu_dev_ctx, LSM6DSO_BASE_PULSED_EMB_LATCHED);
 
	lsm6dso_long_cnt_int_value_set(&imu_dev_ctx, 0x0000U);
	lsm6dso_fsm_start_address_set(&imu_dev_ctx, LSM6DSO_START_FSM_ADD);
	lsm6dso_fsm_number_of_programs_set(&imu_dev_ctx, 2);
 
	lsm6dso_fsm_enable_get(&imu_dev_ctx, &fsm_enable);
	fsm_enable.fsm_enable_a.fsm1_en = PROPERTY_ENABLE;
	fsm_enable.fsm_enable_a.fsm2_en = PROPERTY_ENABLE;
	lsm6dso_fsm_enable_set(&imu_dev_ctx, &fsm_enable);
 
	lsm6dso_fsm_data_rate_set(&imu_dev_ctx, LSM6DSO_ODR_FSM_26Hz);
 
	fsm_addr = LSM6DSO_START_FSM_ADD;
 
	lsm6dso_ln_pg_write(&imu_dev_ctx, fsm_addr, (uint8_t*)lsm6so_prg_wrist_tilt,
                      sizeof(lsm6so_prg_wrist_tilt));
	fsm_addr += sizeof(lsm6so_prg_wrist_tilt);
 
	lsm6dso_ln_pg_write(&imu_dev_ctx, fsm_addr, (uint8_t*)falltrigger,
                      sizeof(falltrigger));
 
	/* route single tap, wrist tilt to INT2 pin*/
	lsm6dso_pin_int2_route_get(&imu_dev_ctx, &int2_route);
	int2_route.md2_cfg.int2_single_tap = PROPERTY_ENABLE;
	//int2_route.fsm_int2_a.int2_fsm1 = PROPERTY_ENABLE;
	lsm6dso_pin_int2_route_set(&imu_dev_ctx, &int2_route);
 
	/* route step counter to INT1 pin*/
	lsm6dso_pin_int1_route_get(&imu_dev_ctx, &int1_route);
	int1_route.emb_func_int1.int1_step_detector = PROPERTY_ENABLE;
	int1_route.fsm_int1_a.int1_fsm1 = PROPERTY_ENABLE;
	lsm6dso_pin_int1_route_set(&imu_dev_ctx, &int1_route);
 
	lsm6dso_timestamp_set(&imu_dev_ctx, 1);
}

[JXiao.1]

And I also read the values in the register, the values are strange. I read the values in LSM6DSO_FIFO_DATA_OUT_L buffer, they are 1310797, 353501276, 0, 0, 0, 0, 0, 0. And it always changes. Which register can be used to read stored steps?

[Eleon BORLINI]

Hi @JXiao.1​ ,

which is the target of your application? I mean how do you combine the three interrupt (the tap one, the step counter one and the third (FSM?)

Did you already check the examples on Github for the step counter (you can try the one without using FIFO--> lsm6dso_pedometer.c), and the other examples (at this link)?

And when you reported that the FIFO content is probably wrong, does it happen only after you application get stuck or also during the 15 minutes of normal operation? Which kind of error does your code return?

-Eleon

[JXiao.1]

Can you tell me some more details? Thank you.

[Eleon BORLINI]

Cannot use the **** word, so the comment cancelled and I had to rewrite it...

[JXiao.1]

Hi Eleon,

I want to use this sensor in a watch. I combine three interrupts, step counter, tap, and wrist tilt(use FSM). I am also collecting the six-axis data for other analysis.

For the step counter, I use the internal function lsm6dso_number_of_steps_get to get steps. It is in lsm6dso_STdC/driver/lsm6dso_reg.c. It can read the step data from the register directly. I want to read the default register which stores the step data. Which register I should set?

For the error, It occurs randomly. Sometimes it doesn't work in five minutes or less. Because I put the IMU process in a multithread, it will not affect the main thread running. So the code doesn't give an error.

[Eleon BORLINI]

Hi @JXiao.1​ ,

>> I want to read the default register which stores the step data. Which register I should set?

If you mean the number of steps, from application note AN5192 p.57:

The step counter indicates the number of steps detected by the step detector algorithm after the pedometer function has been enabled. The step count is given by the concatenation of the STEP_COUNTER_H and STEP_COUNTER_L embedded functions registers and it is represented as a 16-bit unsigned number

If otherwise you mean the relevant step counter flags, you could check the EMB_FUNC_SRC embedded functions register.

But I'm not sure you are able to check the predefined step threshold and duration at least for the embedded pedometer feature.

About the error you are facing, are you able to check the interrupt status at the moment in which the issue occurs, for example triggering a scope for capturing the event?

-Eleon

[JXiao.1]

Hi Eleon,

For the interrupt status, I am a little confused. Because I need to use three functions, there are only two interrrupt for use. I put the step counter and one FSM in an interrupt, and the tap in a single interrupt​. Will there be conflict among them? Sometimes, my device can recieve the interrupt from step counter, and other two no response. It is very strange.

Jiahe.

[Eleon BORLINI]

Hi Jiahe,

the interrupts on the same pin should be already combined in OR configuration (so you shouldn't have issues of overlapping interrupts), as reported in the datasheet, p.48:

The output of the pin will be the OR combination of the signals selected here and in MD1_CFG (5Eh). [for the INT1]

I would suggest you to try setting the step counter and the single tap on one interrupt, for example INT1, while the FSM one on the other, for example the INT2.

Could you please take a scope screen of your INT1 or INT2 behavior during the issue? Are you facing the issue only when you route the interrupts flags on physical pins or also when you read the flags by polling the interrupt registers?

-Eleon

[Gdsfs.1]

I am also facing the similar issue while doing this task please guide me the reason about this issue I am waiting for a valid solution.