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LPS28DFW one shot bit cleared before sample is ready?

wstuchbury
Associate II

Hi, I'm trying to use the LPS28DFW in one shot mode and there seems to be a discrepancy between the devices functionality and the application note.

From an5758 section 3.2 - one shot mode: "One-shot mode has to be executed while the device is in power-down mode by setting the ONESHOT bit (default value 0) in CTRL_REG2(@11h) to 1. When this happens, a single data acquisition is executed and read data are made available in the output registers. Once the acquisition is completed and the output registers updated, the device automatically enters again power-down mode and the ONE_SHOT bit is self-cleared (to 0)"

Based on this I set CTRL_REG1 to 0x03 (power down mode, 32 sample average) and CTRL_REG2 to 0x41 (4096 full scale, one shot enabled). I then poll the value of CTRL_REG2 to wait for the one shot bit to be self-cleared to indicate the acquisition is complete and read out the sample.

However the first reading of CTRL_REG2 is 0x40 (one shot bit cleared), even with almost no delay. This means the output registers are all 0 as the sample isn't actually ready yet. If I put in a fixed delay between the setting of the one shot bit and the reading of the output registers I get the expected output sample so one shot mode is being entered. Am I misunderstanding the description of the one shot mode in the application note or is this some sort of HW bug?

1 ACCEPTED SOLUTION

Accepted Solutions
Federica Bossi
ST Employee

Hi @wstuchbury ,

You understood correctly. When the ONE_SHOT bit is “cleared,” the data is not yet ready in the output registers. Instead, the data is ready if you monitor the STATUS bits.
We will update the application note in the next release.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

View solution in original post

2 REPLIES 2
Federica Bossi
ST Employee

Hi @wstuchbury ,

You understood correctly. When the ONE_SHOT bit is “cleared,” the data is not yet ready in the output registers. Instead, the data is ready if you monitor the STATUS bits.
We will update the application note in the next release.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Thank you, polling the status register for temp and pressure data ready bits works as expected. I also notice the data sheet for the LPS28DFW has similar wording that may need updating.

"The ONESHOT bit is used to start a new conversion when the ODR[3:0] bits in CTRL_REG1 (10h) are set
to '0000'. Writing a '1' to ONESHOT triggers a single measurement of pressure and temperature. Once the
measurement is done, the ONESHOT bit will self-clear, the new data are available in the output registers, and the
STATUS (27h) bits are updated. "

Reads similarly and suggests the one shot bit is cleared after the data is ready.