LIS3DSH FIFO - Interrupt never occurs

[bmak]

Hi!

I'm having trouble to get FIFO to work. Registers write fine, but i think that OVRN flag never sets high.

My config:

CTRL_REG4, 0b01100111 //ODR = 100Hz, BDU = 0, ZYX enabled
 
CTRL_REG1, 0x00
 
CTRL_REG2, 0x00
 
CTRL_REG3, 0b00001000); //Interrupt signals active LOW, Interrupt signal latched, INT1 signal enabled
 
CTRL_REG5, 0b00000000); //BW = 00 anti aliasing 800Hz, Scale +- 2g, Self test disabled, SPI 4 wire
 
CTRL_REG6, 0b01000010); //FIFO enable, P1_OVERRUN enable (Interrupt on INT1 from OVERRUN flag)
 
FIFO_CTRL, 0b01000000); //Stream mode
 
 
 
And my interrupt routine:
 
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin){
 
	if(GPIO_Pin == INT1_Pin){
 
 for(int i = 0; i < 32; i++){
 
 //X
 
 outx_l	= LIS3DSH_Read(OUT_X_L);
 
 outx_h	= LIS3DSH_Read(OUT_X_H);
 
 outx = ( outx_h << 8 ) | outx_l;
 
 
 
 //Y
 
 outy_l	= LIS3DSH_Read(OUT_Y_L);
 
 outy_h	= LIS3DSH_Read(OUT_Y_H);
 
 outy = ( outy_h << 8 ) | outy_l;
 
 
 
 //Z
 
 outz_l	= LIS3DSH_Read(OUT_Z_L);
 
 outz_h	=	LIS3DSH_Read(OUT_Z_H);
 
 outz = ( outz_h << 8 ) | outz_l;
 
 }
 
}
 
}

Normal mode, and DRDY mode with INT1 interrupt works fine. I think that FIFO never starts filling, when I read FIFO_SRC there is always EMPTY flag high.

I'm using STM32 F407 DISC board.

Thanks for help 🙂

[TBomb.1]

Hi, did you compared your configuration with the one available for example on Github --> lis3dsh_fifo_stream.c

Especially the function lis3dsh_fifo_stream(void)

  /* Set bdu and if_inc recommended for driver usage */
  lis3dsh_init_set(&dev_ctx, LIS3DSH_DRV_RDY);
  /* Select bus interface */
  bus_mode = LIS3DSH_SEL_BY_HW;
  lis3dsh_bus_mode_set(&dev_ctx, &bus_mode);
  /* FIFO configuration */
  lis3dsh_read_reg(&dev_ctx, LIS3DSH_FIFO_CTRL, &reg.byte, 1);
  reg.fifo_ctrl.fmode = 0x02; /* FIFO stream mode */
  lis3dsh_write_reg(&dev_ctx, LIS3DSH_FIFO_CTRL, &reg.byte, 1);
  lis3dsh_read_reg(&dev_ctx, LIS3DSH_CTRL_REG6, &reg.byte, 1);
  reg.ctrl_reg6.fifo_en = PROPERTY_ENABLE;
  lis3dsh_write_reg(&dev_ctx, LIS3DSH_CTRL_REG6, &reg.byte, 1);
  /* Configure interrupt pins */
  lis3dsh_interrupt_mode_get(&dev_ctx, &int_mode);
  int_mode.latched = PROPERTY_DISABLE;
  lis3dsh_interrupt_mode_set(&dev_ctx, &int_mode);
  lis3dsh_pin_int1_route_get(&dev_ctx, &int1_route);
  int1_route.fifo_full   =
    PROPERTY_ENABLE; /* Enable hardware notification */
  lis3dsh_pin_int1_route_set(&dev_ctx, &int1_route);
  /* Set Output Data Rate */
  lis3dsh_mode_get(&dev_ctx, &md);
  md.fs =  LIS3DSH_4g;
  md.odr = LIS3DSH_800Hz;
  lis3dsh_mode_set(&dev_ctx, &md);

Tom

[bmak]

Thanks, I haven't found it before.

As far as I understand this code I did configuration mostly the same.

Maybe you worked on config yourself also?

[TBomb.1]

I worked with this code and it did work

Did you configured the THRS3 (1Fh) overrun threshold for overrun detection?

Tom

[bmak]

Actually no, i didn't. What value it should contain in order to detect full FIFO? 0xFF?