iis3dwb power consumption is much larger than datasheet?

[sming.1]

1. just power on the chip (with 3.3V, without any software initializing), it shows it consumes 700uA about current
2. if use reset it by writing SW_RESET in register IIS3DWB_CTRL3_C, the current jumps to nearly 2mA .

Per spec, it should consume only 5uA during power down, max is 16uA. The host mcu is a stm32l451cc, and the spi1 is connected to iis3dwb, int1 and int2 also connected to gpio. The test is that the stm32l451cc in standy mode with HAL_PWR_EnterSTANDBYMode() called.

so the question is 1. the power consumption gap is huge comparing the spec? 2. why a SW_RESET can not be the same consumption with a just power on without any software init? 3. how can achieve as low as possible power consumption ?

[Eleon BORLINI]

Usually Vdd and VddIO are not tied together so that you can manage them separately, and for the Power Down condition.

This is not explicit in the datasheet ("The device core is supplied through the Vdd line while the I/O pads are supplied through the Vdd_IO line"), so they are considered separately by default, even if on other devices these lines can be connected together without problems.

Thank you for having shared the solution to the Community.

-Eleon