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AIS2120 reading issue

anandhram1988
Associate III
  volatile UB__8 ubAisRxData;
  volatile UB__8 ubSpiStatus = 0;

void SPI_vInit(void) {


	disable_interrupts();
    configure_D_OUT_SPI_MOSI_Pin();   // PTBDD_PTBDD5 = 1; // MOSI
    configure_D_IN_SPI_MISO_Pin();   //PTBDD_PTBDD4 = 0; // MISO
    configure_D_OUT_SPI_CLK_Pin(); // PTBDD_PTBDD6 = 1; // SCK
    set_CS1_high(); // Sensor 1 disable
    set_CS2_high(); // Sensor 2 disable


    // SPI Control Register 1
    SPIC1 = 0xD4; // SPE=1, MSTR=1, SSOE=0, CPOL=0, CPHA=0, SPIE=1
    //SPIC1 = 0xF0; // SPE=1, MSTR=1, SSOE=0, CPOL=0, CPHA=0, SPIE=1

    // SPI Control Register 2
    SPIC2 = 0x00;

    // SPI Baud Rate Register (set to suitable speed)
    //SPIBR = 0x10; // Divide bus clock  16 Mhz, spi clock 5,33Mhz
    SPIBR = 0x11; // Divide bus clock  16 Mhz, spi clock 4 Mhz

    // Clear status flags by reading SPIS and SPID
    (void)SPIS;
    (void)SPID;
    enable_interrupts();

}

void SPI_vSendByte(UB__8 ubSpiTransfer, UB__8 ubSpiChannel)
{
	volatile UB__8 ubAisStatus;
	volatile UB__8 ubAisRx;

    while (!(SPIS)); // Wait until transmit buffer is empty

    SPID = ubSpiTransfer;

    while(!ubSpiStatus);
    ubSpiStatus = 0;

}




_INTERRUPT_VOID SPI_vTransferISR (void)
{
	if(SPIS==0xA0)
	{
		ubAisRxData = SPID;
		ubSpiStatus = 1;
	}

}



UB__8 AIS1120SX_ubSensorConfig(UB__8 ubAisSensor)
{
	UW_16 readVal;
	UB__8 retVal = 0;
	UB__8 ubCrcVal;
	UW_16 delay;


	ubCrcVal = AIS1120SX_ubCrcVal (0xE18000); // to read 0c0C register from sensor Sensor type Val

	set_CS1_low();
	for(delay =0; delay < 10; delay++);
	AIS1120SX_vWrite(0xE1,0x80,ubAisSensor );  // REG_CONFIG  FIR is 1600 for X,Y and
	                               //no ofset cancellation
	AIS1120SX_vWrite(0x00,ubCrcVal,ubAisSensor );  // REG_CONFIG  FIR is 1600 for X,Y and

//	AIS1120SX_vWrite(0x8D,0x00,ubAisSensor );
//	for(delay =0; delay < 10; delay++);
//	AIS1120SX_vWrite(0x00,0x00,ubAisSensor );
	set_CS1_high();


	return retVal;
}




void AIS1120SX_vWrite(UB__8 ubAis_addr, UB__8 ubAisData,UB__8 ubAisSensor) {

	UW_16 delay;

	SPI_vSendByte(ubAis_addr, ubAisSensor);

	SPI_vSendByte(ubAisData, ubAisSensor);

}
UB__8 AIS1120SX_ubCrcVal(UL_32 ulCrcVal) {

	UB__8 crc = 0x00;
	UB__8 poly = 0x97;
	//UL_32 poly = 0x12F;
	UB__8 i;
	UB__8 b;
    // Process only the top 3 bytes of data24 (ignoring the lowest byte)

    for (i = 0; i<3; i++)
    {
       crc ^= (UB__8)((ulCrcVal >> (i * 8)));

       for (b = 0; b < 8; b++)
       {
           if (crc & 0x80)
           {
              crc = (UB__8)((crc << 1) ^ poly);
           }
           else
           {
              crc <<= 1;
           }
       }
    }


	   return crc;

}
14 REPLIES 14
anandhram1988
Associate III

I always get zero in response from AIS2120 sensor, anyone can help please

TDK
Super User

The chip expects 32-bit messages and you're sending 8-bit messages.

TDK_0-1750961267687.png

 

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anandhram1988
Associate III

actually i also tried with 32 bit messages, you can see trace below 

anandhram1988_0-1751027542469.png

 

TDK
Super User

Show two valid 32-bit transactions back to back as it does in the example, with proper CS line handling.

If you feel a post has answered your question, please click "Accept as Solution".

anandhram1988_0-1751032793016.png

 

Andrew Neil
Super User

You said you had solved this issue?

https://community.st.com/t5/others-hardware-and-software/ais2120sx-sensor-read-data-issue/m-p/817173/highlight/true#M32000

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.
anandhram1988
Associate III

hi @Andrew Neil  yes, i can see the responses from sensor, now debugging further with this but i dont know why the spi clock must be downscaled its works with <1Mhz as of now


@anandhram1988 wrote:

 i dont know why the spi clock must be downscaled its works with <1Mhz as of now


Again, you should look at the signals in the analogue domain with an oscilloscope - are they clean?

Are you still using the logic-level translator? If so, maybe that imposes a limit - the oscilloscope would tell you!

 

 

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

Looks like it's working to me.

 

Long wires are not going to be amenable to high data rates.

If you feel a post has answered your question, please click "Accept as Solution".