How to generate the wake-up request pulse (WURQ) with an L6360?

[JHutt.1511]

I simply can't figure out how to generate this pulse with my STEVAL-IOM001V1 board. Even the supplied code (en.stsw-iom001) doesn't make me any wiser.

[HWies.1]

I’ve read your report with the oscillogram with great interest. In fact, the data sheet does not explain how the WURQ can be generated. The pulse strength after an I2C command depends on the pre-flight voltage at C/Q and therefor it is useless as WURQ. After many attempts, I found a solution. I have tested it with the inductive sensor AI402. The effect is reproducible, but I am not sure how it works. What was your solution? It is ST's responsibility to make this clear in the data sheet.

[TinLethax]

I've seen this post after I got my board generating the WURQ. What I did was that I used Timer 15 in one pulse mode with output compare on channel 1 and compare only on channel 2. Right before starting the pulse (enabling the counter), the alternate function of the UART TX pin is switched to TIM15_CH1 which make the normally high output goes low, then the L6360 inverted it to High. And when the CC1 flag was raised with interrupt after 80us has passed, I switched pin alternate function back from TIM15_CH1 to UART2_TX. And the later when the CC2 flag was raised after 400us, I set the variable flag that indicate that the pulse has ended. Then I can proceed to start communication.

[HWies.1]

I'd like to try out your implementation. Could you please post the code snippet?

[TinLethax]

Hi. Sadly I can't post the code (even a snippet of it) as it was under NDA of the work I'm currently working on. But I'm happy to share with you the step by step.

1. Initialize the Timer in up counter mode. I set the prescaler to get the counter running at for example 12Mhz, Then I calculated the Pulse period (tLow + tHigh) from start to finish before sending COM1 message (in this example case is around 4800 Cycle), put this value into the ARR.

2. Set the timer into One pulse mode.

3. On compare channel 1, configure it as PWM mode 1, enable preload (OC1PE) and fast (OC1FE).

4. Set Output compare polarity to active low.

5. On compare channel 2, configure it as Frozen mode (no output via gpio), preload (OC1PE) and fast (OC1FE).

6. In this example, to get the 80us pulse, I set the compare value of CH1 to 960. As for the CH2, I want to get the interrupt when the pulse cycle is near the end (counter is very near the ARR) so I set it to 4799, I'll explain later why I do this.

7. Enable Both CH1 and CH2

8. Set MOE bit to enable output compare to GPIO

9. Enable CH1 and CH1 compare interrupt (CC1 and CC2), also don't forget the NVIC.

To start the pulse

1. Enable the CQ output of the L6360.

2. Set alternate function on the uart pin to switch from UART_TX to TIM15_CH1

3. Enable the TIM15, also set a flag in some variable to indicates that the pulse has been started. 

What will happen after is the GPIO which normally stay logic high due to UART TX will suddenly goes logic low because of switching pin mux to the TIM15 compare output. At the same time the counter is counting up. Then 80us has passed. When the counter reached the first compare (which is the compare of CH1) two things will happen, the GPIO will go high as the value has been compared and the interrupt will be raised.

In the interrupt routine. We checks two things.

Firstly, when I got CC1 interrupt which triggered, I will quickly switch the alternate function back to UART_TX, this detaches any further signal coming from TIM15 and instead attaches the pin back to UART. Then I just clear the CC1 Flag. The output of CC1 is technically stay high after the compare event. But when the timer is automatically disabled, It will soon has logic low as its idle state.

Secondly, still remember the CH2 ? We can use this to get an indication flag that will tell us that the pulse period has ended, this served as a delay after the pulse to gives the device some time to switch from SIO to SDCI mode (referred in datasheet as Tren described in Wake-up request characteristics). Like the CC1, I will just clear the CC2 interrupt flag and set my own flag to tell the application that actively polling for the pulse cycle to end. 

The reason of why I have to use CH2 to indicates the pulse end is because timer in one pulse mode will automatically disable when the counter reached the ARR. And since the counter is stopped, there will be no update flag generated as the counter is stopped right before overflow.

[HWies.1]

Thanks for the information. It can't be true that a special IC for IO-Link requires so much software effort. The MAX22515 generates the WURQ simply by setting a bit in the WAKE register. In case of the L6360, the documentation is seriously lacking.