I am building a board that will use both the STM32L4R5VIT 100pin package and Bluenrg-2 232. I would like to JTAG chain the two processors so that I can use my Segger Jlink to debug both processors from the same debug connector. The pins to use for JTAG particularly for the Bluenrg-2 are not clear. Do you have a diagram that will allow me to set my debug configuration up as I wish? I've attached a pptx file with some thoughts, but I need validation.
In addition, I need to hook up the communications path between L4 and BlueNRG. Would you make a recommendation for this path? Can I use I2C or do I need to use SPI/UART?
Thanks in advance.
