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Michael Obieglo-Diete
Michael Obieglo-Diete
Associate
October 11, 2017
Solved

SPC570s ADC initializing

  • October 11, 2017
  • 3 replies
  • 1546 views
Posted on October 11, 2017 at 11:54

Main target is to send an ADC-value to the CAN-BUS.

I took the SPC570xx_RLA CAN Test Application for Discovery

Modified Pin Settings:

0690X00000608ZNQAY.png

in main.c I tried to initialize and use the ADC:

0690X00000608ZSQAY.png

Without ADC-code CAN example works fine.

But if I try to get Access to the ADC-regs, System crashes:

0690X00000608ZTQAY.png

The system always stays at the _IVOR1 after SAR_ADC_12BIT_B0.xxxxx = x command.

My hardware is the SPC570S-DISP-Board.

What do I wrong?

#adc #spc570s #spc570s-adc
This topic has been closed for replies.
Best answer by Erwan YVIN
Posted on October 11, 2017 at 15:12

Sorry , i was on a bad revision of the reference manual not the last one (Revision 6 RM0349) 

Table 12 was not correct on rev 3.

after checking with expert. 

here is the answer.

'The problem is not related to wrong address of the supervisor ADC (

SAR_ADC_12BIT_B0

), but It is related to clock gating.

Every time a driver is start (xxx_lld_start) the correct PTCL register is written in order to gate the clock to the peripherals. When using a driver not included in spc5studio

The first operation to do before accessing register is to gate the clock using the function, otherwise IVOR1 is generated.

SPCSetPeripheralClockMode(PCTL NUMBER, (SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2)));

In this case the PCTL NUMBER for

SAR_ADC_12BIT_B0

is 112 (table 658 in the RM).'

                      Best regards

                                   Erwan

3 replies

Erwan YVIN
Erwan YVIN
ST Technical Moderator
October 11, 2017
Posted on October 11, 2017 at 14:09

Hello Michael ,

it seems to be a header file issue on SARADC Section & Documentation.

the address 0xFFE3c000 is RESERVED and IVOR1 logical according the RM.

0690X00000608ZcQAI.png0690X00000608ZmQAI.png

Could you replace SAR_ADC_12BIT_B0 by SAR_ADC_12BIT_0 (cf xpc570s.h)?

Anyway , i am submitting an ER for this inconsistent header file.

       Best regards

                  Erwan

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question.
Erwan YVIN
Erwan YVINBest answer
ST Technical Moderator
October 11, 2017
Posted on October 11, 2017 at 15:12

Sorry , i was on a bad revision of the reference manual not the last one (Revision 6 RM0349) 

Table 12 was not correct on rev 3.

after checking with expert. 

here is the answer.

'The problem is not related to wrong address of the supervisor ADC (

SAR_ADC_12BIT_B0

), but It is related to clock gating.

Every time a driver is start (xxx_lld_start) the correct PTCL register is written in order to gate the clock to the peripherals. When using a driver not included in spc5studio

The first operation to do before accessing register is to gate the clock using the function, otherwise IVOR1 is generated.

SPCSetPeripheralClockMode(PCTL NUMBER, (SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2)));

In this case the PCTL NUMBER for

SAR_ADC_12BIT_B0

is 112 (table 658 in the RM).'

                      Best regards

                                   Erwan

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question.
Michael Obieglo-Diete
Michael Obieglo-DieteAuthor
Associate
October 11, 2017
Posted on October 11, 2017 at 18:24

It works. THX for help.

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