STM32 MCUs Security

Hi All,i have downloaded the STM32U585 firmware package from the official sources and want to implement the TFM SBSFU program code into my development board(U585-IOT2A) using STM32 Cube IDE. The user manual mentions installation not possible using Cube IDE and works with EWarm IAR Workbench version 8.50.9. But i am not able to download the mentioned version of EWarm IAR Workbench. Please suggest the following:Implementation support using STM Cube IDEWorking IDE version of EWarm IDE.Kindly provide assistance regarding the same.References Used : UM2851 and STM32U585 Firmware PackageThanks and Regards

The question below refers to L452.I encounter once in a while a random activation of the readout protection.I suspect the code that disables the watchdog operation before switching to STOP mode (as it updates the user option bytes).Can this affect the readout protection? is there another idea why is the protection fired?Thanks,Ariela

I have a user bootloader I have used across various STM32 parts over 12 years. In production RDP level 1 is enabled and this has always been fine for various STM32F1, F2, F4 based products we have in production, and for thousands of units in the field. However on a new product using an STM32L151C8T6A, setting RDP prevents update via this bootloader.The bootloader uses XMODEM-1K over UART - the target emits the "C" start character and starts the update of the application area if the host responds to the start character before a timeout. With RDP=0, this process works as expected. With RDP=1, the first XMODEM-1K packet is sent in response to the "C" start byte, but it is ignored (i.e. no ACK, NAK or CAN) and the existing unmodified application boots. I do not believe that the processor is resetting, because that would cause the "C" to be emitted again, rather it seems to be ignoring the XMODEM-1K packet, and booting after timeout.There is no JTAG/SWD connection, and nothing connected on-

Hello, I'm a bit stuck and I am not sure what to do so I am asking for your help.Here is the problem :I have a custom board with a STM32WB35 that was working fine for a while. But after multiple (incomplete) boot when I was soldering the battery to my board it seems to have altered the STM because it doesn't boot anymore. The other consequence is that I can't write a code anymode to this micro. I am using a J-Link and STMCubeIde and everytime I try it fails at the very beginning (compare 0%) then shows this error :"ERROR: Timeout while calculating CRC, RAMCode did not respond in time."At the beginning of the program the option bytes are modified to be able go in bootloader mode in some situations. That's why I was thinking that while writing the option bytes the STM32 got interrupted and it may have harmed the STM / the program.I tried to start from fresh, erasing the flash using J-Link Commander v7.86.But I was not possible because the flash is locked.I can't read the flash where the

I'm using STM's cryptographic library on a STMf412ret6 to encrypt a 16 byte message using a 2048 bit public key generated by the Python-RSA 4.8 library, first result on google for "python rsa".I've verified the key being received by the MCU is identical to the one generated and I've verified the encrypted message is identical once it makes it back to the Raspberry Pi running the python script. Upon attempting to decrypt the message it throws the error for not being able to find proper pkcs#1 v1.5 padding. I've tried manually adding padding, so I know that the issue is not of the ST library not automatically doing padding. Stepping through the python RSA library I have found that the resulting clear text message doesn't contain the original message anywhere which leads me to believe it is an issue with ST's library. Here is my code for calling the library:static void dcu_encrypt_aes_key(uint8_t aes_key_to_crypt[16], uint8_t encrypted_aes_key[256], size_t* encrypted_key_size) { if (cmox

i am enable trust zone and I make one part as secure world and another part as a non secure world using (SECWM1, SECWM2) but forget to enable Dbank as (Dbank = 1) now I couldn't make any changes in option bytesmy question is1.how can I enable dual bank mode (Dbank = 1)?2.if I will launch my both binary what will happen?3.what are the steps to recover my device?

I set the start address about RAM is 0X20002000, and disable shared but execution.Than, I set a function which data is 0x20002004 to change the protected data.when system enter the function, it will reset.

I have configured the STM32CubeExpanision_Crypto_V4.0.1 folder using the STM32CubeIDE. Within the folder is a main.c file for a SHA256 digest located in ..STM32CubeExpansion_Crypto_V4.0.1\Projects\NUCLEO-L476RG\Applications\Hash\SHA2_Digest\Src. Within that file, there is a string of text for a message, and a string of text for the expected hash. However, I have typed in the text online in a sha-256 digest calculator and the generated hash value is not the same as the one in the main.c file. I have CRC enabled but I do not understand why the expected hash value in the main.c file is not correct.Below is the string of text for the message and expected hash value.Below is the string of text for the message and expected hash value in raw form Msg = 6b918fb1a5ad1f9c5e5dbdf10a93a9c8f6bca89f37e79c9fe12a57227941b173ac79d8d440cde8c64c4ebc84a4c803d198a296f3de060900cc427f58ca6ec373084f95dd6c7c427ecfbf781f68be572a88dbcbb188581ab200bfb99a3a816407e7dd6dd21003554d4f7a99c93ebfce5c302ff0e11f26f83

Hi,My project is based on STM32L15xx microcontroller. I know, that internal FLASH Read Protection may be enabled during programming an image by STMFlashLoader with --erp option. My question is: can I compile my image with internal FLASH read protection enabled by some tweak so that I don't have to use "--erp" option on downloading my image to the target?Thanks in advance!

Hello,I wanted to try the SBSFU topic 6 step by step youtube video, i accidentally flash the Userapp.bin with the RDP level 1, (and also with Write protection enable in bank1).I try to change the RDP level back to 0, and also disable the Write protection on bank1, however the mass erase option had not been successful, can you advise if such revert is possible? it means that those protected area was not able to be erase.(0x8000000), or the board had become unusable?

looks like the same issue like in: STM32F423 Generating AuthTag for AES crypto is not working

Dear all,I have a question regarding the read-out-protection on STM32 L1 series (STM32L151CB-A) and I was wondering, if the same problem occurred to anyone of you before.I am booting from internal flash memory (BOOT0 = GND) and set the option bytes RDP to BB (Read out protection level 0) using the Cube Programmer.However, after doing so, the controller is not booting anymore. Even after a hardware reset pulling the NRST line low.My program is also writing to the FLASH and EEPROM - could this be an issue?(HAL EEPROM / FLASH unlock).What could be the origin of the problem?Thank you and all the best!

Hello,I've two STM32 development kit and would like to implement and test the secure boot loader, however it's not working. There is NO serial print after programming boot loader G0_BL.bin load or Application G0_App4BL.bin. I read the location of 0x08000000 and 0x08008200, i see there exists code.​The code i've referred is from the below videoVideo reference: Security Part4 - STM32 security in practice - 10 Simple boot loader lab​The development kits i'm using are ​Nucleo-wb55rgSTM32U585 discovery kit ​Can you please help me here what i'm missing. ​Thanks & RegardsRajesh​

I am using the STM32F746VET6 which was setup with STM32CubeMX project. In the code it creates I see there's a STM32F746VETX_RAM.ld linker file and a #define VECT_TAB_SRAM to locate the IVT in RAM, but I don't see in MX where I specify that I want the autogenerated code to behave that way. Am I just missing something?The reason I want the IVT in RAM is that I want to reconfigure which ISR is used for a timer depending upon a setting set through the SPI port. Doing this by overwriting an IVT in Flash would be a problem for my bootloader which has a CRC over the entire Flash range.

I am trying to implement the sha1 function using the cryptographic library offered from STMicroelectronics. I believe I have properly imported the library as per the directions in Security:Getting started with the Cryptographic Library - stm32mcu. From here, how do i implement a simple SHA-1 function?

Is there a manual for the STM cryptographic library V4? I know the legacy V3 cryptographic library has a manual (https://www.st.com/resource/en/user_manual/dm00215061-stm32-crypto-library-stmicroelectronics.pdf), but I cannot find an updated manual for V4. I would like to study an updated manual so I can learn how to use the library properly.

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I aim to load my application at 0x08002000 instead of 0x08000000(base address) and secure the first two sections which will be used to store CRC and other firmware update information.I use a post-build script to calculate the CRC using srecord utility on application firmware and embed it into the executable at the base address.I also change the vector table offset to #define VECT_TAB_OFFSET     0x00002000U.but don't know why it was not working, following is my observation:1)When I just build & load the application firmware at the address of 0x08002000 without embedding CRC it was working.2)But when I embed CRC into the executable it was not working, I also verify flash contained and that it was loaded properly. (After loading cube-programmer gives a warning: The core is locked up)Am I missing any steps? Please help me here to resolve my issue.

I've found an inconsistency between different reference manuals of STM32 embedding the CRYP peripheral, about the management of IVs in GCM mode:The HAL seems to implement the second solution.Could you confirm ?Best regards

Hi All,Did Someone use AES encryption/Decryption in STM32F407?, because I'm using existing example of AES encryption and its not working on my board, EN bit isn't enableing.

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Hello to all,I am using a STM32H743 and create a SPI master (SPI4) and a SPI slave (SPI2). I have connected the pins used (including NSS). For receiving and transmitting I use DMA in both parts, master and slave. The configuration was done with STM32CubeIDE (1.11.2) and I use the ST HAL drivers.Additionally the master and slave instance run in their own freeRTOS threads.When I use the SPI without CRC, everything works fine.When I enable the CRC, I always get CRC errors. For testing I send only one byte in each direction. When I look into the SPI registers, the RXCRC and TXCRC registers for SPI2 and SPI4 hold different values. It looks like the CRC of SPI2 is truncating the calculated CRC value.Here is my configuration Here are the values on the bus, the first byte is the payload for testing (master sends 0x02, slave 0x03):When I get the error callback, I get these values back:My expected crc values are 0x2042 for payload 0x02 and 0x3063 for payload 0x03.SPI4 calculates the correct valu

Hello,is there any example of a TFM application that is supported by STM32CubeIDE?I came across the iot-reference-stm32u5, but the structure of the project is way different from any other TrustZone and TFM examples available as part of the STM32CubeU5 Firmware Package and find this a bit confusing.Would really appreciate if someone could shed some light.Many thanks

Hi,I want to compute APP's hash (SHA256) from my Bootloader using DMA.I have 3 non adjacent zone to process the HASH.If I use one node and call HAL_HASHEx_SHA256_Start_DMA inside HAL_HASH_InCpltCallback, I can compute my HASH.I hope I can use link list in order to let DMA process all zone and use CPU to process only the last one (to clear MDMAT bit). However, this fail. I never goes in GPDMA IRQ.What I want is to configure DMA in link-list mode to send all block except last one to HASH without interrupt CPU. The last block will be send when GPDMA run last LLI IRQ (DMA_TCEM_LAST_LL_ITEM_TRANSFER) .How can I do that?Thanks for your help.Have a good day.Aurélien