STM32 MCUs Embedded software

Config:stm32h743iiT6SDRAM 32mb model w9825g6khFLASH 32mb QSPI 1 bank 4 lines w25q256jv2Screen 7 inch 24bit rgb888I am really stuck on stm32 jpeg hardware vs libjpeg working 1 Decoding 1024x600 stored in qspi flash with jpeg harware stuck with the jpeg markers === FINDING JPEG IN QSPI === Found JPEG at offset 0x069000 (address 0x90069000) :triangular_ruler: Found SOF0 at offset 484: 160x94 Dimensions: 160 x 94 Found JPEG at offset 0x089000 (address 0x90089000) :triangular_ruler: Found SOF0 at offset 552: 160x93 Dimensions: 160 x 93the image is really 1024x600 stored has standard in photoshop to avoid progressive stuff.... Offset 7252: SOI (start) - Offset 7418: SOF for 160x94 thumbnail - Offset 11289: EOI for thumbnail - Offset 15044: SOF for 1024x600 main image ← Your real image! - Offset ???: EOI for main image Is there any body witch have faced those problems to hardware jpeg decode can you share your experience .....

Hello, I am testing SPI5 TX by GPDMA on an STM32N6 device and I found behavior that seems inconsistent with the reference manual. MCU / Environment MCU: STM32N647X0H Toolchain: STM32CubeIDE 2.1.1 CubeMX / CubeN6 version: STM32Cube_FW_N6_V1.3.0 Issue summaryI configured SPI5 as: Master Simplex TX-only Software NSS SSI set high I configured GPDMA1 Channel0 as: Memory-to-peripheral Source = TX buffer Destination = SPI5->TXDR Transfer length = 8 bytes TX pattern = A5 5A A5 5A A5 5A A5 5A Observed behavior If I write data directly to SPI5->TXDR by CPU, MOSI outputs correctly. If I use GPDMA for SPI5 TX, SCK may appear, but MOSI stays low / no valid TX data is output. I reduced the project to a minimal LL test case and the behavior is reproducible. What I already verified Same SPI5 pin configuration is used in both tests. CPU TX path works with the same SPI configuration. TX buffer content is correct in memory (A5 5A ...). DMA source addres

Hi community.TLV230adc5140 - SAI 4CH(TDM) - STM32 - USB_FS_ 4CHmic - Window(LInux RP5) I reuse partly code from memsmic1 project to create 4 microfone audio device. Everything look well for channel 1 and 2 I got some trouble whit CH3 and CH4.  Please help whit    wrong channel mapping for channel 3 and 4. It is mapped on channel  1 and 2  on usb interface. One can see it on attached picture. Here is TLV switched off, SAI(DMA call back) reused for 4 sin generator 1,2,3,4 kHz for every supposed channel. Here you see the picture.Where i  am wrong?    

Hi everyone, I am working on a dual-core project using the STM32H747XI. I am implementing a custom Tickless Idle mode in FreeRTOS on the Cortex-M7 (CM7) core using LPTIM1 as the wakeup source. I’m facing a specific issue regarding the interaction between D1 and D2 domains: The Scenario: CM4 is running a continuous task (intended to stay active). CM7 enters low-power mode via vPortSuppressTicksAndSleep. If I use HAL_PWR_EnterSLEEPMode(), everything works perfectly—CM4 keeps running, and CM7 wakes up as expected. If I switch to HAL_PWREx_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI, PWR_D1_DOMAIN), the CM4 core seems to "die" or freeze as soon as CM7 enters the DStop state. Is it physically possible for CM4 to continue executing code if the D1 domain is in DStop (CM4 is using only LPTIM1 on D3 and timers on D2)? Code snippet used on CM7: _weak void vPortSuppressTicksAndSleep(TickType_t xExpectedIdleTime) { // Generated when configUSE_TICKLESS_IDLE == 2. // Functio

Hello, I can't cope with interrupt transactions. (I need it later for composite device).For tests I generated HID device example. When device is connected to host it appears correctly in the system.For interrupt endpoint configured 0x81.I need to answer for interrupt transactions, but which callback is responsible for this?I start debugging from very deep. Breakpoints were set in HAL_PCD_IRQHandler(). As I understand in this functions all usb transactions starts, but I see only interrupts from ZERO endpoint. Dumping by WireShark I see host sends requests to my device x.xx.1 and responses.Why I don't see interrupts for 0x81 (also I check 0x01) in HAL_PCD_IRQHandler()?What I do wrong?

Hello ST Community,I am working on a USB Video Class (UVC) application using STM32H7S3L8 (NUCLEO-H7S3L8) in USB HS device mode.Requirement:Streaming 640×480  30fps (YUY2, uncompressed), requiring ~18.4 MB/s bandwidth.With the STM32 HAL, I can only achieve:~8.2 MB/s (1024 bytes × 1 transaction per microframe)This limits performance to ~13 fps at 640×480.USB 2.0 specification allows up to 3 transactions per microframe for high-speed isochronous endpoints.However in STM32 HAL:ep->maxpacket = ep_mps & 0x7FFU masks transaction bitsNo MC (multi-count) handling in DIEPCTLEndpoint structure has no field for multiple transactionsHAL does not configure high-bandwidth isochronous mode   Does STM32H7 USB OTG HS support high-bandwidth isochronous transfers (2x/3x transactions per microframe) in device mode?If supported:Is there any register-level guidance to configure this?Any example or application note available?

Hi I configured the DFSDM1 on the STM32H753VIT6 for a MEMS Mic.I got the problem that the DMA Callback on (Half)/Full buffer never gets called. I used AN5027 as guideline and the DFSDM Audio ExampleD-Cache disabled and set the Audio Sampling Frequency low (4kHz) to debug over UART. Main (snippets):DFSDM_Filter_HandleTypeDef hdfsdm1_filter0; DFSDM_Channel_HandleTypeDef hdfsdm1_channel4; DMA_HandleTypeDef hdma_dfsdm1_flt0; . . . . int32_t LeftRecBuff[1024]; void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) { /*Never Reached*/ } int main(void) { HAL_Init(); SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_DMA_Init(); MX_DFSDM1_Init(); /* USER CODE BEGIN 2 */ // imu_init(&hspi4, GPIOE, GPIO_PIN_4 /* IIM-42652 CS */); HAL_DFSDM_FilterRegularStart_DMA(&hdfsdm1_filter0, LeftRecBuff, 1024); while (1) {} }Config (CubeMX)/** * @brief DFSDM1 Initialization Function * @PAram None *

I am currently working on the STM32N6570-DK board and need support for MIPI camera interfacing using CSI (not USB).RequirementInterface a MIPI camera using CSIRead camera dataEncode the dataSend it to a PC via Ethernet using UDP streamingSupport NeededHow to configure and enable CSI (MIPI camera interface)Any reference examples/projects for camera bring-upGuidance on reading camera data from CSIAny examples for encoding + Ethernet (UDP) streamingKindly provide any documentation or example projects that can help achieve this.

Post edited by ST community moderator. In next time please use </> to share a code. HI, I have Implemented ADC1 - DMA with one channel and ADC2 - DMA with 7 channels and im transmitting data through UART IT. I want to know if this code works usually. void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { if (hadc->Instance == ADC1) Print_ADC_Values_IT(); if (hadc->Instance == hadc2.Instance) Print_ADC_Values_IT(); } hadc2 is workin only when i disable HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&adc1_value, 1); Here's the overview of my code: MX_GPIO_Init(); MX_DMA_Init(); MX_ADC1_Init(); MX_ADC2_Init(); MX_USART1_UART_Init(); /* USER CODE BEGIN 2 */ // HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); HAL_ADCEx_Calibration_Start(&hadc2, ADC_SINGLE_ENDED); // Start ADC1 (1 channel) // HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&adc1_value, 1); // Start ADC2 (7 channels) HAL_ADC_Start_DMA(&hadc2, (uint32_t*)adc2_values, ADC2_CHANNE

Hi,I am using STM32H755 where M7 and M4 runs bare-metal firmware using OpenAMP (RPMsg).Sampling rate is set to 250 SPS. The data is sent from M4 to M7 using OPENAMP_send() function.Observation: Data loss of approximately 10% is observed during transmission from M4 to M7. The loss does not follow a fixed pattern.Questions:- Is this an expected behavior with RPPMsg/OpenAMP at this rate?- How can I ensure reliable transfer without data loss? Thanks & Regards,Bhagyashree Ghosh Roy

I am developing a project using the STM32U5G9J. In particular I based our board on the STM32U5G9J-DK2 board. My project includes over the air update for which I am using the external flash that comes on the DK2 board for temporary firmware swapping storage. The external loader MX66LM1G45G_STM32U5G9J-DK2.stldr looks like is not accessing beyond 64MBytes, giving the impression of mirroring the first 64MBytes. I need to be able to have the external loader handle fully the 128 MBytes, as well as my application being able to access the 128 MBytes by code. I am using the STM32CubeIDE 1.19.0. which the IOC file configuration for HSPI is in OCTO SPI mode with the capacity to read 128MBytes. I am using the external loader to manually write certain pieces for debugging purposes. I cannot verify if my code works until the external loader is being able to access the full 128MBytes. Please help me providing the right external loader, as well as the certainty that the IOC file can have the HSPI acce

Greetings!I am trying to establish a connection between STM32F439IIH6 (Slave) and a customize board (Master) through SPI DMA application. The customize board has its own built-in driver with SPI application. The communication between STM32F4 and customize board eventually broke down after few thousands of cycles. Through some investigation, I found out that the SPI_WaitOnFlagUntilTimeout() hangs inside SPI_DMATransmitReceiveCplt(). It sutcks inside the else statement of SPI_WaitOnFlagUntilTimeout(). The clock used in customize board (Master) is 80Mhz with clock division 4/** * @brief This function handles SPI Communication Timeout. * @PAram hspi: pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout) { uint32_t tickstart = 0; /* Get tick */ tickstart =

I have enabled USB with the following settings:Following USB middleware is enabled like so:In the linker script I have moved everything from DTCMRAM to RAM.Additional section is specified like so.dma_buffer : { *(.dma_buffer) } >RAM_D2And used like so:/** Received data over USB are stored in this buffer */ __attribute__((section(".dma_buffer"))) uint8_t UserRxBufferHS[APP_RX_DATA_SIZE]; /** Data to send over USB CDC are stored in this buffer */ __attribute__((section(".dma_buffer"))) uint8_t UserTxBufferHS[APP_TX_DATA_SIZE]; At this point USB device enumerates but looks like no descriptors are transferred to the host.I also tried to enable MPU like so:But that did not do the trick.However, when RAM region base address (0x24000000) is used instead of RAM_D2 (0x30000000) for MPU, device enumerates correctly:and there is no need for:__attribute__((section(".dma_buffer")))on rx and tx buffers anymore.Now the question. How to correctly place only the USB related stuff to

Hi,I am new to ST platform, i am facing an issue as below.C:/Users/Yuvaraj/Desktop/Test/1/Middlewares/Third_Party/LwIP/src/apps/http/fs.c', needed by 'Middlewares/LwIP/apps/http/fs.o'. StopI am opened the project from examples codes.Can anyone help ? How to resolve this? Regards,Yuvaraj V

If I don't enable RX line inversion, everything works fine. But when I enable inversion, I constantly get frame errors. The DMA operates in cyclic mode, without interruption. It's just like a ring buffer. In normal mode, everything works without problems. The signal source itself was tested on another device with a purely hardware signal inverter, and everything was fine. It's unclear why enabling inversion causes the problem. Perhaps someone can give me a hint as to what might be causing this? Thank you.

Hi,I´ve problems getting UCPD running on a STM32H563. With STM32G0 I´ve alraedy realized a lot of such projects with UCPD. Hence I suggest, that it maybe is a problem of the DMA which is much more complicated to configure on the H5. Is there any information about how to configure UCPD on H5?Best,Achim

I am using STM32H743VIT6 with USB3300 to develop a HS USB Device.But the program is always trapped in USB_CoreReset() at  do  {    count++;    if (count > HAL_USB_TIMEOUT)    {      return HAL_TIMEOUT;    }  } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); I am using a VCP example generated by CubeMX for testing without any other code.  environment 

Hi,I am writing firmware to read and write to a MicroSD card in SPI mode using an STM32G051F8P6.Card initialization, performed in the order of CMD0, CMD8, CMD55 and ACMD41, CMD58, works correctly. However, when I then try to read the first sector with CMD17, incorrect data is read. The table below extracts the values ​​from bytes 446-461, which contain information about the first partition, from the sector read values ​​with the first byte set to 0.The top row shows the data written to the MicroSD card as read by FTK, and the bottom row shows the values ​​actually read by CMD17. In both cases, bytes 510-511 are 0x55 and 0xAA, satisfying the data requirements for the first sector.Bytes446447448449450451452453454455456457458459460461Correct Data0x000x820x030x000x0C0xFE0xFF0xFF0x000x200x000x000x000xDC0xD10x01CMD17 Result0x000x020x040x000x060x180xD80xC80x810x000x000x000x7F0x930x3B0x00The analysis results from the logic analyzer are shown in the following image, and a response to CMD17

I've adapted the NUCLEO DRP1M1 reference design to build and compile for our Custom STM32U5A9 board, and when I run it, iit gets through these relevant pieces:MX_GPDMA1_Init();MX_UCPD1_Init();MX_TCPP_Init();But then inMX_USBPD_Init() is seems to hang in the Call to:USBPD_CAD_Init() which is part of the compiled STM_USBPD_Library. Running a debugger and working my way backup the call stack, it appears that the library calls CAD_Init()which ultimately callsUSBPDM1_AssertRd(PortNum)where the debugger falls apart. AssertRd has at the beginning the 2 below callsLL_UCPD_TypeCDetectionCC2Disable(Ports[PortNum].husbpd);LL_UCPD_TypeCDetectionCC1Disable(Ports[PortNum].husbpd);LL_UCPD_TypeCDetectionCC2Disable(Ports[PortNum].husbpd); <- appears to work fine.LL_UCPD_TypeCDetectionCC1Disable(Ports[PortNum].husbpd); <- stops functioning.husbpd points the appropriate address for the UCPD controller.I've set a breakpoint here, and manually set CC2TDIS and is is fine, and then when I manually

hello ST Community, I'm developing the bootloader for the STM32H755 microcontroller from a specific flash memory address of 0x08010000. I also modified the USER_VECT_TAB_ADDRESS definition in the file 'system_stm32h7xx_dualcore_boot_cm4_cm7.c', as follows: /************************* Miscellaneous Configuration ************************/ /* Note: Following vector table addresses must be defined in line with linker configuration. */ /*!< Uncomment the following line if you need to relocate the vector table anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic remap of boot address selected */ #define USER_VECT_TAB_ADDRESS #define FLASH_BANK1_BASE 0x08010000U #if defined(USER_VECT_TAB_ADDRESS) #if defined(CORE_CM4) /*!< Uncomment the following line if you need to relocate your vector Table in D2 AXI SRAM else user remap will be done in FLASH BANK2. */ /* #define VECT_TAB_SRAM */ #if defined(VECT_TAB_SRAM) #define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BA

Hello all, I explain you my problem the best I can.   I have a project with the MCU STM32U575RGT6 The project has TouchGFX and FreeRTOS. After the initializations of the peripherals, I have the next calls, so the while(1) in main.c is not executed. As you can see in the next image. So for the moment the only main loop I have detected in the application is the timer interruption. In CubeMX I have 3 timers defined: TIM17, which is been assigned to the system as the timebase source: And timers 2 and 4 with the same exact parameters in CubeMX: (timer3 is related to an encoder....)   I initialize the corresponding interruptions. The problem is that in the interruption HAL_TIM_PeriodElapsedCallback I never get the call of the timer 4 instance. Any help will be welcome.

I have changed the ThreadX system timebase on an STM32H7 from 10 ms to 1 ms (i.e., the RTOS tick is now 1 ms). The application is quite large and makes extensive use of ThreadX services such as thread delays, semaphores, mutexes, event flags, and timeouts in various system calls, all of which are specified in ticks. With this change, the real-time duration of existing delays and timeouts is effectively reduced (for example, a delay that was previously 1 second now becomes 100 ms), so I would like to understand whether these values need to be scaled accordingly or refactored using time-based conversion macros to preserve behavior. In addition, the system uses NetX Duo, which runs on top of ThreadX, and I would like to confirm whether NetX Duo fully depends on the same ThreadX tick and whether changing the tick period to 1 ms has implications for network timing, such as TCP timeouts, retransmissions, or protocol timers. Finally, I am interested in best practices and potential risks, such

I am currently developing CSI using the STM32N6. I would like to study the project at the following link: https://github.com/STMicroelectronics/STM32N6-GettingStarted-ObjectDetection/blob/main/Middlewares/stm32-mw-camera/Release_Notes.mdHowever, the release notes state "Support for the STM32N6570-DK board only." Does this mean it is impossible to develop this project or related CSI projects on the NUCLEO-N657X0-Q?please help me

Hi all, I am trying to bring up a new custom board with an STM32H7R7 and external flash as well as external PSRAM. While I managed to get the external flash working after some try and error, the external PSRAM seems to be more stubborn. The board uses a IS66WVO8M8DALL-200BLI from ISSI (https://www.issi.com/WW/pdf/66-67WVO8M8DALL-BLL.pdf)  The PSRAM is connected to XSPI1 in OctoSPI mode. The XSPI clock is configured to 133MHz. At the moment the MPU is completely disabled to not having to debug several things at once.  The MX_XSPI1_Init() currently looks like this: static void MX_XSPI1_Init(void) { /* USER CODE BEGIN XSPI1_Init 0 */ /* USER CODE END XSPI1_Init 0 */ XSPIM_CfgTypeDef sXspiManagerCfg = {0}; /* USER CODE BEGIN XSPI1_Init 1 */ /* USER CODE END XSPI1_Init 1 */ /* XSPI1 parameter configuration*/ hxspi1.Instance = XSPI1; hxspi1.Init.FifoThresholdByte = 2; hxspi1.Init.MemoryMode = HAL_XSPI_SINGLE_MEM; hxspi1.Init.MemoryType = HAL_XSPI_MEMTYPE_MACRO

Hello,I need to sync the stm32n6 system timer to be used as PTP master. According to the Reference Manual there is a PPS input that can generate timestamp and interrupt: ETH_PTP_AUX_TSBut according to the RM it is not in all models, and I can't find which models it exists and how to map it to external IO. Thanks,Noam.