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Hi All!I have a issue about SPI DMA communication on NUCLEO-H563 Board. Details are as follows.My Configuration of STM32CubeMx as shown in the figure1 and 2.figure1figure2I call the function of HAL_SPI_TransmitReceive_DMA(), it comes to line 2212 of program and return HAL_ERROR then.I debug the program and find the value of hspi->hdmarx->Init.DestDataWidth is 0, so it return the error.Then I back to check the initialization of spi1 dma. I find that the Init.DestDataWidth of handle_GPDMA1_Channel2 is already 0 before execute statement __HAL_LINKDMA() .So I guess maybe somewhere my configuration of spi dma is wrong somewhere and I can't figure it out.Please help me for this question.Thanks!
Hello, I have made a custom board based on the EXSPIN32G4-DUAL. I want to use these motors for my project https://iflight-rc.eu/products/xing2-2207-1855kv-fpv-motor?_pos=4&_psq=XING2&_ss=e&_v=1.0.How can I get the params of the motor, is there any chance to use the motor profiler with my custom board? If i need to get the params elsewher wich ones are necessary for sensorless FOC? Thanks!
OK, I have a STM32L462RE Discovery Kit (apparently a.k.a. B-L462E-CELL1).I am trying to get its sole Demonstration application to work (STM32CubeExpansion_CELLULAR_V7.1.0\Projects\B-L462E-CELL1\Demonstrations\Nx_TCP_Echo_Client), but I can’t even tell how it is supposed to work. I see “TCP_Echo_Client” in its name, so I assume if I have a simple TCP echo server running on my workstation that if I do the appropriate port forwarding through my router along with the appropriate Windows Firewall settings, then I should see the B-L462E-CELL1 connect to my local TCP Echo Server. Is that correct?Further, I assume that in this file:STM32CubeExpansion_CELLULAR_V7.1.0\Projects\B-L462E-CELL1\Demonstrations\Nx_TCP_Echo_Client\NetXDuo\App\tcp_echo_client.cI should change TCP_SERVER_PORT from 7 to whatever TCP port my local TCP Echo server is running on, AND I should change the TCP_SERVER_ADDRESS IP_ADDRESS(52,215,34,155) in that same file from 52,215,34,155 (which implies 52.215.34.155) t
Hi,it seems I have some general problem with the understanding of the SPI transmission with the STM32H5.I have an SPI, configured as master for transmission only. Initialisation and stuff is done by CubeMX-generated code, but the transmission shall be done more or less "manually". Means: I want to send 3x 1 byte by writing them one after an other into the related TXDR register.Now what I do NOT understand is, what flag do I have to wait for in order to see if a) I can write the next byte into the FIFO and b) see if all three bytes have been sent?From my understanding:a) can be achieved by waiting for the TXP-flag being set. As long as this is the case, I can write the next byte.b) can be achieved by waiting for the TXC-flag being set. As soon as this is the case, all data have been transmitted.However, there seems to be a dependency to the CR2-register. When I set it to 0,TXP appears once and then never again. When I set it to 3, TXC never appears.So I can't find a situation where
I noticed that any example created with touchGfx for the STM32H750B-DK demo board uses the ExtMem_Boot bootLoader that uses a 400Mhz clock instead of 480Mhz, but the strangest thing is that it uses a QSPI clock of only 50Mhz, when from the memory datasheet it could reach 120Mhz.
Hello!I have a custom board with NAND flash connected. One of the DMA channels is used during write operations to move data from RAM to FMC buffer (mem-to-mem mode). The channel has low priority so theoretically it shouldn't interfere with other channels. Second DMA channel (same DMA controller) with high priority is intended to receive ADC data (two ADC channels with x8 oversampling). DMA channel works in circular mode non-stop, ADC is triggered by timer (1kHz, single conversion, discontinuous mode disabled, ADC_REG_OVR_DATA_OVERWRITTEN mode, 92.5 cycles per conversion).The issue is an ADC overrun during NAND write operation (mostly not every operation but with certain periodicity) what results in missing value as if ADC channels were swapped. Besides these DMA channels, two more DMA channels are used on same DMA controller but the latter ones aren't active at the moment of ADC overrun. If you simply move NAND DMA channel to another DMA controller, the overrun disappears.This looks we
In this regard, I would like to use STM32L5 or H5 development boards to implement the LWIP protocol stack+FREERTOS minimal system. I have no idea how to build the LWIP protocol stack on the FREERTOS system. May I ask if you can send me the LWIP protocol stack code or demo suitable for STM32L5 or H5。Thanks!
Question moved from this thread (a new question) Thank you very much for the solution. However, I’m still unclear about the core point. My main concern is that I need CAN files such that, when the code is flashed onto the STM32L4R9I-EVAL board, it should behave in the following way: upon receiving a CAN message, the board should either print something which is predefined or perform an action in response to that message. Could you please help me with this
I want to connect the AD7605-4BSTZ ADC (operating from +10V to -10V) with the STM32H743. I plan to use a parallel connection for 16 bits to achieve high accuracy, and I also want to utilize DMA. I need to configure the microcontroller in STM Cube IDE to use this connection. Additionally, I would like to simulate the setup before starting the manufacturing process.
As I tried to find CAN drivers for " STM32L4R9I-EVAL" but I didn't find any, And I tried configuring CAN example of Stm32L476G-Eval board but it is not working.Anyone who worked on CAN (Protocol )configuring on STM32L4R9I-EVAL board please Guide me in this
Dear sir,We are using the STM32H747XIH6 microcontroller in our custom board, which includes Wi-Fi functionality connected via the SDIO interface. The Wi-Fi module part number is LBEE5KL1DX-883.Could you please provide a reference source or sample code for the Wi-Fi bring-up? We are looking for a standalone application that can simply perform a Wi-Fi scan to verify the hardware functionality.If an operating system (OS) is required for this, kindly help us with the appropriate OS source and setup steps, as we are new to STM32 MCUs. Best regards,Samudralankaiah.
PA0_C/PA1_C/PC2_C/PC3_CWhat is the base address for the above four GPIOs that can be set?Also, do you have the following understanding about the above 4 pins?Pxy_C can be set to a pin of the same function or another function by controlling an analog switch.
Hello everyone,I am working with the B-UWB-MEK1 evaluation kit that features the B-UWB-MOD1 ultra-wideband module. My primary goal is to implement Real-Time Location System (RTLS) functionality using this evaluation kit.I would like to know:Where can I find the software package or SDK for this evaluation kit that includes RTLS capabilities?Is there any ready-to-use RTLS demo application or example project available for this module?Are there any specific instructions or documentation available to set up and use the RTLS software package with the B-UWB-MEK1 kit?Any guidance, download links, or tips to get started with the RTLS features for this UWB module would be highly appreciated!Thank you in advance for your support.
Hello,I'm trying to migrate my project from STM32G474I-eval board to STM32H757I-eval (dual core)' but I'm facing some troubles.My original project has several peripheral : CANFD, ADC1, DAC, USART. I tried to define all these according to the Data sheet of STM32H757I on Core M7 only (just to try to migrate to single core at the beginning), but when I was trying to check ADC1 I have already encountered some problems.First of all according to the STMCubeMX the only available pins for ADC1 were (PA0, PA0_C, PA1_C), and in the DMA settings - I put DMA1 Streem3 (Circular). According to data sheet the pin PA0_C is connected to the CN5 and RV1 potentiometer so I was expecting that moving the potentiometer to different values would actually change the output on PA0_C.The problem is - when I'm running the debugger on the STM32H757I board I always find myself in the HAL_ADC_IRQHandler function, and never get to the ADC_DMAConvCplt callback (where the HAL_ADC_Co
In an inherited code I see LL_GPIO_Init() being called with pin definitions (LL_GPIO_PIN_xx) OR-ed together, presumably to define multiple pins of the same port to the same settings, in one call of the function.The documentation (doxygen header) to LL_GPIO_Init() does not say this is allowed; neither says so the description of the init struct. Is there any authoritative documentation which allows this?Thanks,JW
Hi All,We are currently exploring microcontroller options to meet our system requirements. The system must support Ethernet communication at 1Gbps while simultaneously driving 24 GPIOs (12+12) with a single clock output at a speed of 38 MHz. All GPIOs should be updated on the rising edge of the clock signal and must be refreshed within half of the high duration of the clock signal, approximately 6ns.Additionally, the system requires high-speed external RAM to process data of approximately 1GB data. We have evaluated the GPIOs driving mechanism on one microcontroller, we encountered a bottleneck with the DMA clock source, as few clock cycles are required for proper DMA processing and updated GPIOs status by timer trigger event.We are seeking a microcontroller that meets these specifications and provides an efficient solution.Any suggestions will be appreciated.Thank you in advance.Jaydeep.
Dear Sir,We are facing an issue while bringing up the STM32 microcontroller (part number: STM32H747XIH6) using the internal SMPS.When we power the MCU through the LDO path, everything works fine, and we are able to connect to the STM32 via JTAG. However, when using the internal SMPS, the MCU does not respond and we are unable to establish a connection through JTAG.We have attached the relevant portion of the schematics for your reference.Could you please help us identify the issue with the internal SMPS configuration? Best Regards,Samudralankaiah.
Hi! I read from many posts that it's possible to use FAFTS with this board, but I can't get the project to compile without errors. The weird thing is that errors appear between the files of the libraries themselves (attached photo). Variables that are defined show up as undefined. Moreover, in the main I have also defined this type of variables and it accepts them well. Any idea what might be going on?Thanks
Hello everyone,I'm currently working on a project with a custom electronic board (still in development). This project includes a 1280x400 display, driven via MIPI DSI by a processor (likely an STM32F429ZG or STM32F479ZG depending on the required pin count). Additionally, I prefer not to use an OS (so no FreeRTOS).To test the display part, I have an STM32F769I-EVAL evaluation board. Initially, I would like to generate a project, display some content using TouchGFX, and interact with it via embedded software (e.g., updating circle progress). Once this is set up, I plan to connect my custom display to the board (we have an adapter board for this).I have tried creating projects via TouchGFX and then importing them into STM32CubeIDE (as indicated on the TouchGFX site on the "Running without an RTOS on a TouchGFX Board Setup" page and in other tutorials) but without success. I also tried creating the project via STM32CubeIDE, enabling TouchGFX in the "Software Packs," and then opening it in
Hello Community,I'm working on a storage module using SDcard for my project.The chip I'm using is STM32H743XIH6.At present, the SD card has been successfully read and written in the polling (ordinary) mode. However, I have never succeeded in reading and writing the SD card in DMA mode.Could you please provide a complete illustrated tutorial of the configuration process?For now, there is no need to introduce fatfs. Just read and write a block in DMA mode.If possible, please also provide a configured.ioc file and the test code. PS:STM32CubeMX Version: 6.14.1
I am trying to periodically transfer data to the first byte of GPIOA (PA0-PA7) using DMA Channel 1 and TIMER1, but am hitting a transfer error immediately after enabling the DMA channel for transferring. * I can write to GPIOA->ODR using the CPU and I've confirmed the output on a scope, so the GPIOA timer is enabled and the pins are set as outputs.* I am able to confirm that TIMER1 is running at ~20Khz, because it is able to toggle its associated GPIO pin (PA8) at the desired frequency. This is plenty low compared to the system frequency, which is north of 16Mhz (not sure exact value, PLL is enabled)* I believe the DMAMUX is connected correctly because if I disable the timer, no transfer error shows up for DMA ch 1 ISR and NDTR doesn't change (as expected).* I've confirmed the peripheral address is set to 0x50000014, which lines up with GPIO->ODR.* I've confirmed the memory address is set to 0x20001F60, which lines up with the buffer on the stack.* NDTR is non
Hello,I would like to design a microphone array with up to 16 microphones. I want to use the stm32h7a3zi board which has a lot of peripherals.I was looking at the DFSDM interface, but with only 8 channels / 8 filters up to 8 pdm microphones can be handled.On the contrary, the SAI interface seems to be more promising. If I understood correctly, the SAI interface can be configured as PDM interface, and every SAI can handle up to 6 microphones. Moreover, the SAI interface supports synchronization between SAIs modules. Do you have suggestion/comments?
Hello,Im working on a program which sends data from the ADC to the computer. My problem is that the data from my STM32H563ZIT6 is bad. I first noticed this from looking at the data sent from the computer and confirmed this by outputting the ADC data through the DAC. Attached is the output from a 50Khz sine wave. I am not sure what is causing this stair stepping pattern. For reference I have the ADC clock at 75Mhz, 6.5 cycle sample time, and triggered by a 1Mhz timer.I did notice that the data in the buffer seemed to be mostly shifted left 4 bits (though it never goes above 4095) or is missing the first 4 LSBs. I ran the same program on an STM32F303RET6 and got the expected output from the DAC.What am I missing that could be the cause of this oddity? Attached is the H563 program which exhibits this behavior.Thank you!
I found an application note which goes in depth on DMA transfer speeds and clocking for F7 chips, but haven't been able to find anything similar for H7 chips. I have a few questions:How are each of the DMA controllers clocked on an H7xx chip? My assumption is MDMA is on the AXI clock and DMA1, DMA2 and BDMA are on the AHB clock. Is this correct?How would I go about calculating the worst-case latency for a memory-to-memory transfer by a given DMA controller from a given location in memory to another (in the same bank, or a different one)? How much latency does each domain link add, and do the H7 memory buses follow the same round robin allocation scheme described in the F7's application note? For example, if I were transferring 1 word of data from SRAM1 to AXI SRAM, how long would it take using each of the BDMA, DMA1, and MDMA controllers?
I wonder why I have data in the buffer when my sample rate is 30KHz and 0 when the sample rate is 50KHz. My code:/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "adc.h" #include "dac.h" #include "dma.h" #include "spi.h" #include "tim.h" #include "usart.h" #include "gpio.h" /* Private inc
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