STM32 MCUs

Hi,I'm facing some issues with some STM32G474RET6s, and want to rule out counterfeit chips, even if that seems unlikely.After googling for some solutions, I confirmed the AP IDR register and the DBGMCU_IDCODE both hold a revision ID of 3, which I expected from the X code on the label. However, I noticed that the markings on the chip match the LQFP80 footprint, rather than the LQFP64 we purchased.I have read the qualifications about how device markings can differ, but it doesn't hurt to ask: is this outdated documentation, or is there a possible issue?Thanks.

Dear all, i have a problem with my custom board based on STM32H745.I need to use core M4 with USB_HS host with mass storage class (a pen drive) at 12Mbit full speed (internal Phy transceiver).I have configured the processor as per attached file (core M4, FatFS, USB host, 48MHz RC clock for USB).The problem is that the FATFS Applistate variable is always in "application start" and never became "application ready". So that USB pen drive can not be mounted.Previously, I succeded in use the FATFS pack with the same functions configured with core M7, but I want to use core M4 because I need it in my project architecture.Consider that with the same FATFS pack I'm able to use SD card on the M4 core.I can't figure why I'm not able to migrate the USB HS host from M7 to M4.See also attached the function where the USB Host should be recognized and configured to receive data (in my project microSD card store datas and I want to download it to pen drive)

Due to more performance requirement, i wanted to change the ThreadX timebase to 1ms. To what i have researched till now i need to make the following #define TX_TIMER_TICKS_PER_SECOND to 1000 which is usually set at 100 which is 10ms. Any idea what else need to be done to make the ThreadX timebase to 1ms other than this or is this enough already?Thanks a lot for guidance.

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code and a linker script content. Please read this post: How to insert source code. Hi,I was trying to use multiple ADCs in stm32f103c8t6. I have configured seven channels in ADC1 using DMA and ADC2 as single channel without DMA. Both trigger interrupts where ADC2 has the highest priority. The sampling time for the seven channels of ADC1 and single channel of ADC2 is 41.5 cycles and 239.5 cycles respectively. The ADC clock frequency is 10.667MHz. I calculate that ADC1 interrupt is triggered every 35.4us and ADC2 interrupt is triggered every 23.6us. System clock is 64Mhz. I have a third Interrupt which is a timer interrupt which is triggered every 560us. So the problem now is that when the sampling time of ADC2 is reduced 71.5 cycles (approx 8 us) or below, only the ADC2 is getting triggered. The code is not triggering the ADC1 interrup

Hi everyone,I am using a STM32H563RG and I need the RTC to work even if the VDD is powered off. To do that, I am plugging a battery on the VBAT pin to power the RTC and the Backup domain. But I tested it and it seems the RTC is stopped and the backup domain is cleared when VDD is powered off.Here is my initialisation code :/* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ICACHE_Init(); MX_CRC_Init(); MX_SPI1_Init(); MX_TIM3_Init(); //MX_RTC_Init(); MX_ADC1_Init(); MX_ADC2_Init(); MX_TIM2_Init(); MX_FileX_Init(); MX_IWDG_Init(); MX_TouchGFX_Init(); /* USER CODE BEGIN 2 */ LL_PWR_EnableBkUpRegulator(); LL_PWR_EnableBkUpAccess(); if(LL_RTC_BKP_GetRegister(RTC,LL_RTC_BKP_DR0) == 0x32F2){ //Read Backup register to see if it was previously written RTC_Datas.RTC_initialized = 1; //Set flag GPIO_Set(Led_orang); //Turn Orange LED On }

I am working on an STM32 + Azure RTOS project where I need to access the same SD card in two different modes: When the microcontroller accesses the SD card directly, I use FileX with an SDIO/SPI driver. When the SD card is connected to a PC via USB, I use USB MSC (Mass Storage Class) so that the PC can read/write the card. Individually, both functions work perfectly:  FileX can read/write SD card when MCU is accessing itUSB MSC works when PC is connected However, when I try to support both modes simultaneously, the SD card fails to work correctly.There is no reference example from ST or Microsoft showing how to share the SD card between FileX and USB MSC at runtime. My main question: How can I properly share the same SD card between FileX (MCU access) and USB MSC (PC access) in Azure RTOS, ensuring that both do not access the file system at the same time? Is there an official method, mutex mechanism, media lock, or recommended design pattern for this scenario?

Hello, I am working with the STM32H7S78-DK board.With STM32CubeMX 6.16.0, I open the provided board project STM32H7S78-DK.I am surprised about the assignment of the SPI4 pins:MX project SPI4 Pin Name:PE6 = SPI4_MOSIPE12 = SPI4_SCK PE13 = SPI4_MISObut uses the real hardware boardPE14 = SPI4_MOSIPE12 = SPI4_SCK PE13 = SPI4_MISO 

I am using STM32WB55 and entering STOP2 mode for low-power operation.RTC Wakeup timer is configured, and the interrupt works correctly in RUN mode,but the MCU does not wake up from STOP2 mode when the RTC wakeup interrupt is expected.Configuration:- RTC enabled using LSE- Wakeup timer configured with WUT- MX generated code + custom low power entry- NVIC enabled for RTC WakeupTried:- Ensured RTC interrupt flag is cleared before entering STOP2- Enabled DBG and checked if STOP2 entry works- Checked PWR->WUPEN / PWR_SCR flagsStill, the MCU does not wake when RTC WUT expires.Any suggestions or known STM32WB55 issues related to STOP2 + RTC Wakeup?__PRESENT__PRESENT

Hi,I'm using STM32H7 dual core, where the data has to be shared between the cores, so im having totally 21 variables totally 76 bytes, thought of do it like a structure, so where to place the structure exactly for this data sharing. so, this structure should be placed in any linker file of one of the cores or where?if so, thus we have to keep the structure in both the core or whatwhich method is a fastest wat to share the data, like a ring buffer, HSEM.if we use HSEM, we can use that structure or access outside, before calling the HSEM TAKE, or structure values should be assigned only inside after the HSEM TAKEOVER.  regards,srinath

CubeIDE, STM32H747I-DISCOFor some reason my build keeps failing to find the adv7355.h even though the header is clearly in the project space & other headers with that path are found, see picture below. Anyone any clue why this is happening?w,

I have a situation where a USB endpoint stops working due to a control packet being NAKed in the handshake phase. I've traced the problem down to the STM USB stack setting DCTL.SGONAK = 1 in response to an INCOMPISOOUT event, yet in the case when it fails, no global OUT NAK status notification appears in the RxFIFO and the GINTSTS.GONAKEFF interrupt status never occurs. However, the DCTL.GONSTS bit does change from 0 to 1 after SGONAK is set.Yet, according to the reference manual for the STM32H757 (RM0399 Rev 4, page 2908):Setting the global OUT NAK Internal data flow:When the application sets the Global OUT NAK (SGONAK bit in OTG_DCTL), the corestops writing data, except SETUP packets, to the receive FIFO. Irrespective of thespace availability in the receive FIFO, non-isochronous OUT tokens receive a NAKhandshake response, and the core ignores isochronous OUT data packets.The core writes the Global OUT NAK pattern to the receive FIFO. The application mustreserve enough receive FIFO sp

Hi!EDIT: WARNING! This is no real fix... The bug remains...With STM32Cube_FW_F2_V1.9.0 and CDC's /dev/ttyACM0 I had funny glitches on VoidLinux, when i tried full duplex communication (host<>device):some packets never arrived at the USB hostsome short packets had their first 4 byte twiceDeepSeek suggested to choose different endpoints for data in and out... like this:#define CDC_IN_EP 0x81U /* EP1 for data IN */ #define CDC_OUT_EP 0x02U /* EP2 for data OUT */ #define CDC_CMD_EP 0x83U /* EP3 for CDC commands */it seems like those glitches disappeared now... Or i did not dare to test it hard enough...Why is CDC_OUT_EP 0x01U by default, although DeepSeek thinks, that the STM32F207 hardware cannot cope with that, because IN&OUT stream share somehow the same hardware elements, if they are configured for the same endpoint?It was easy to fix, after i found Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h , but i wonder now, if i really found the bug...Seems like

I am trying to update a text area called textTestArea with a string and I want to be able to format the string with a newline character.    Ex "I went to the store \n to buy food" I created a texts called genericText that uses a default font that has wildcard range 0x00-0xFF ,  I also tried having range 0x20-0x7e and wildcard character 0x0A (/n)here is the text and typography:  Here is the screen with text area:in baseview.cpp it creates:  textTestArea.setPosition(397, 26, 237, 55); textTestArea.setColor(touchgfx::Color::getColorFromRGB(0, 0, 0)); textTestArea.setLinespacing(0); Unicode::snprintf(textTestAreaBuffer, TEXTTESTAREA_SIZE, "%s", touchgfx::TypedText(T_GENERICTEXT).getText()); textTestArea.setWildcard(textTestAreaBuffer); textTestArea.setTypedText(touchgfx::TypedText(T___SINGLEUSE_E1ZC)); add(textTestArea);So now in my view.cpp: static const uint16_t TEXTBUFFER_SIZE = 64; Unicode::UnicodeChar textBuffer[TEXTBUFFER_SIZE]; U

Hi everyone,I tried implementing tickless idle on my STM32H7 CM7 core following a tutorial I found: https://www.youtube.com/watch?v=hVlpf1Rm4QoI suspended the tick (TIM6) and set up LPTIM as the wakeup source.However, I noticed that my core wakes up every 41 ticks, even though my ONLY task is delayed by 2000 ticks. It seems like the core is being woken up prematurely, and ulExpectedIdleTime is only 41 instead of 2000.Does anyone know why tickless idle is not sleeping for the full expected duration, or what could be causing these frequent wakeups despite SysTick being disabled?Pre Sleep fuction:__weak void PreSleepProcessing(uint32_t ulExpectedIdleTime) { /* place for user code */ HAL_GPIO_WritePin(LED_1_GPIO_Port, LED_1_Pin, GPIO_PIN_SET); //printf("[CM7][PreSleepProcessing]entered PreSleepProcessing!\r\n"); HAL_SuspendTick(); //suspend SysTick Timer HAL_LPTIM_TimeOut_Start_IT(&hlptim1, 0xFFFF, ulExpectedIdleTime); // enable interrupt from low power timer }And Post funct

CNC material affects EMI, thermal dissipation, and grounding.I found this CNC material selection guide helpful:https://www.justway.com/blog/CNC_Machining/How_to_Choose_the_Perfect_Material_for_CNC_Machining_A_Comprehensive_Guide_fb9e953e.htmlHow do you select materials for STM32 enclosures?Do you consider heat spreading for high-load MCUs?Which materials reduce noise in mixed-signal designs?Any lessons from industrial STM32 products?”

Hello everyone,I am currently migrating a project from a Newhaven ATXL series display to their newer ASXP series (both 4.3", 480x272 RGB interface) on a custom board based on the STM32F767.I am trying to isolate the root cause of severe color artifacts I'm seeing, specifically whether this is a Software configuration issue, a signal integrity issue on my Custom PCB, or a potential hardware defect in the display panels I received.The Situation: I have configured the LTDC timings strictly according to the new ASXP datasheet. However, the image is unstable and has artifacts.The "Hot-Swap" Verification: To troubleshoot, I performed a live test to rule out my PCB connections:I initialized the STM32F767 with the new ASXP LTDC settings.Connected the new ASXP screen -> Result: Artifacts/Noise.While powered on, I swapped it with the old ATXL screen.Result: The old ATXL screen works perfectly even when driven with the new ASXP timings.Video of the test:My Question: Since the old screen works

Dear Sir,I am currently using the STM32 NUCLEO H723ZG board with the X-CUBE-ST67W61 expansion. I want to transmit the ADC values from the STM32 board via Wi-Fi. I attempted this using a trial-and-error method but was unsuccessful.Could you please guide me on how to achieve this? I am completely new to working with X-NUCLEO boards.I am sharing my code for your reference. Kindly take a look.Thank you,

Hi - I'm about to start in on a new motor control application using ST Micro products. Can anyone suggest what a reasonable range of speeds I might be able to get good velocity control over?  This will be a sensored application with high resolution encoders. Maybe 4K-16K counts per revolution. For example, If the maximum motor speed is 4000 RPM will I be able to maintain good speed control down to 400 RPM? 40 RPM? 4 RPM? "Good" speed control might be +/- 5% or so. And the load changes will be small, probably less than 20% or so.Thanks

Content:Hi,I am using UART on STM32G4 in interrupt mode (RXNEIE + NVIC enabled). I observed the following situation:  1. A byte is received → RXNE = 1 2. At that moment, UART interrupt is disabled (critical section) 3. Later I re-enable the UART interrupt 4. But the RXNE interrupt does NOT fire, even though RXNE is still = 1 This causes my Modbus task to freeze because no further RXNE interrupts are generated. ------------------------------------------------------------------------------------------------------------------- My question:Is this the expected behavior?i.e.,Does STM32G4 USART generate the RXNE interrupt only when RXNE transitions from 0 to 1,and not when RXNE is already 1 at the moment the interrupt is enabled? I could not find a clear statement about this behavior in the Reference Manual. If this is the intended design, please confirm, and if possible, point to the exact section in the documentation. Thank you.

I am attempting to reconfigure Pin 8 (datasheet default assignments are PB6/PA14-BOOT0/PC15-OSCX_OUT) from PA14-BOOT0 to PB6 GPIO Output Open Drain (GPIO_MODE_OUTPUT_OD) a short time after start-up.My current attempt (code below) does not accomplish this (instead, once the port pin reconfiguration code below has run, an attached STLINK device can still connect to the MCU, or if already connected to MCU, continues to function.)IMPORTANT: I have not yet and do not plan to change MCU option bytes (using STM32Programmer).Intention: In the application (under development, written in C using STM32CubeIDE, using HAL), at power-up, a connected STLINK device should function normally. A short time later (under condition set in firmware), the application firmware is expected to reconfigure Pin 8 from power-on default (as Port A, GPIO bit 14, Alternate Function 0, which is STLINK SWCLK) to a different configuration (as Port B, GPIO bit 6, Open Drain output).This change should (ideally) be able to o

Hi everyone,I’m working with an STM32L5 USART and trying to clarify a point about parity vs. MSB-first transmission.From the reference manual (USART parity control / frame formats), when parity is enabled the frame formats are shown as:M=00, PCE=1: SB | 7-bit data | PB | STBM=01, PCE=1: SB | 8-bit data PB | STBand there is a note that “in the data register, the PB is always taking the MSB position (8th or 7th depending on M)”.This wording caused confusion in our class:one interpretation is that because parity occupies the MSB position in the data register/word length, it might be transmitted before the data bits when MSBFIRST=1.My understanding is:MSBFIRST only reverses the order of the data bits inside the data field.The parity bit remains the parity field in the frame, i.e. logically after the data field and before stop bits.The “MSB position” note refers to the bit slot within the word length/data register, not to the time order on the line.Could someone confirm:Question:When MSBFIR

Heya!I've been borrowing an STLINKV3MINIE and today my own (legitimate) STLINK/V2 arrived today, but I haven't been able to detect it. I purchased the product from Mouser (https://au.mouser.com/ProductDetail/STMicroelectronics/ST-LINK-V2?qs=H4BOwPtf9MC1sDQ8j3cy4w%3D%3D&srsltid=AfmBOooS1jAwuhdu3ZF7xo5hJ7OWAqrWYGnkUSL7hzKZPl6fvURN-Hnq).You can see in device manager, when I have the V3MINIE connected, it shows in the DM panel:When I connect with the V2, my computer does recognise it:I have been using the same USB port on my computer, and I am using the cable that arrived with the V2 to connect it. The red LED on the V2 is on (remains red, no flashing), but I'm getting nothing.When I try connecting to it via STM32CubeProgrammer with the V2, I get nothing (Verb level 3):It does not detect the Serial Number and doesn't show up as something to connect to in the cfg panel:It works A-OK with the V3 as soon as I plug that back in (same settings), but not with my V2.I had downloaded the V2 dr

Hello,I am using STM32H750VBT6 to perform microSD card write operations. After a number of writes, the CPU sometimes resets during a write operation. At the same time, the Vcore (1.13V) rail shows a voltage drop. The issue is random, but the higher the write frequency, the faster it occurs. Below are details of my hardware, software, and test results. 1. Hardware designThe power supply module:The power supply is designed with 12V input, generating 3.8V, 3.3V, 1.8V, and 1.13V.3.3V powers the STM32 VDD pins, and 1.13V powers the VCAP pins.Each VCAP pin is decoupled with a 0.1 µF capacitor in parallel with a 4.7 µF capacitor (located close, but not on the same plane due to vias).The SD card interface: 2. Software designInitialization code generated by STM32CubeMX + HAL library: void MX_SDMMC1_SD_Init(void) { hsd1.Instance = SDMMC1; hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; hsd1.Init.BusWide = SDMMC_BUS_WIDE

Dear STM32 users and developers, This new thread is back and is dedicated for our technical developers community to share last STM32 updates, the first part will be products documentation news such as datasheets, Erratas, Applications notes  followed by specific subject's presentation(s) during the last period in a monthly basis . The format and the content will evolve in next editions...    You can leave us your comments on this initiative on this thread    Many thanks to @Tesla DeLorean  @TDK  @waclawek.jan   !  Any proposal is welcome for subjects you want to be addressed , Stay tuned . Cheers, STOne-32 

Hello everyone,I’m working on a control unit board based on the STM32F407VETx (LQFP100) microcontroller. During development I noticed that some pins configured as external interrupts (rising edge) were being triggered more often than expected.To better analyze the issue and exclude possible mistakes in my code, I prepared a minimal test project with the following configured pins in IOC:Pin 9 – PC15: GPIO_EXTI15 - INPUT_1Pin 97 – PE0: GPIO_EXTI0 - INPUT_2External crystal/ceramic resonator (HSE)Serial Wire Debug with SysTick as timebase sourceThe only user code added is in gpio.c:/* USER CODE BEGIN 0 */ volatile uint8_t counter_1 = 0; volatile uint8_t counter_2 = 0; /* USER CODE END 0 */ . . . /* USER CODE BEGIN 2 */ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { if(GPIO_Pin == INPUT_1_Pin) { counter_1 = (counter_1 + 1) % 255; } if (GPIO_Pin == INPUT_2_Pin) { counter_2 = (counter_2 + 1) % 255; } } /* USER CODE END 2 */ On my board both PIN9 and PIN97 have the following