2007-11-20 08:18 PM
Reset on the JTAG
2011-05-17 03:18 AM
Hello,
I have one question about the Reset on the JTAG. Do you know what is it being reset with that feature NRST? Yes... I know what it means (to reset something) but in this particular case, I am not so sure about what it is done. Thank you, Marta2011-05-17 03:18 AM
See Cortex 3M Core Technical Manual, chapter 6.2 - Resets. NRST is equivalent of SYSRESETn, I think... This pin resets the entire processor system excluding of debug logic in NVIC, FPB, DWT, ITM, AHB-AP. There is none mention of SWJ-DP, but I think it is excluded too.
2011-05-17 03:18 AM
I think the name of the signal asked by Marta should be ''nTRST'' (Test reset), not ''nRST''. This signal only reset the JTAG interface logic. It does not reset the processor core or debug components.
2011-05-17 03:18 AM
I think that I understand right.
So, thank you for your help!! Both messages have helped me. Marta