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    I have performed crosstalk calibration of VL53L7CX ToF sensor using a 0.2 mm thick polycarbonate cover glass. I had used a sheet of white paper (assuming 80% reflections) placed at 600m as reference surface & 4 samples were used for calibration.    The calibrated sensor's accuracy was tested using a similar setup but with reference surface at 400 mm. The distance values observed in the 64 zones ranged from 396 to 426 mm. The standard deviation of the distance values were in the range of 2.2 to 4.5 mm. The heatmap of the zones also looked uniform.    But when I mounted the sensor in an enclosed space (around 1m X 1m X 1.5m) upside down pointed towards my objects of interest, I'm observing some random ghost detection in some of the zones. There are no objects in these zones at distances given by the ghost detections. But there could be objects/surfaces in nearby zones. Also, these ghost detections were not present when I did the same experiment

CNC material affects EMI, thermal dissipation, and grounding.I found this CNC material selection guide helpful:https://www.justway.com/blog/CNC_Machining/How_to_Choose_the_Perfect_Material_for_CNC_Machining_A_Comprehensive_Guide_fb9e953e.htmlHow do you select materials for STM32 enclosures?Do you consider heat spreading for high-load MCUs?Which materials reduce noise in mixed-signal designs?Any lessons from industrial STM32 products?”

I want to train some small DL models with Nvidia's RTX 50 series GPU, which can work properly only with CUDA 12.x. I've learned that the CUDA 12.x is only compatible with ONNX Runtime 1.17.x or newer version. So I want to know if the X-CUBE-AI 10.2.0 support ONNX Runtime 1.17.x or newer version? If it can, I would like use the X-CUBE-AI 10.2.0 to deploy my DL models on the STM32 MCUs.

Hii,I am working on a custom board based on the STM32MP257FK3 SoC. For initial bring-up, I am currently using a Linux/bootloader build that was generated for the STM32MP257F-DK reference board.On my custom hardware, the DDR memory has been changed from LPDDR4 (used on the DK board) to DDR3. While reviewing the STM32MP25 software stack, I noticed that the DDR type impacts not only the DDR controller configuration but also the PMIC voltage settings, which differ between LPDDR4, DDR3, and DDR4 designs.I would like clarification on what software changes are strictly required to make DDR3 work correctly on a custom STM32MP257F board.Specifically, I would like to understand whether supporting a different DDR type requires only Device Tree changes, or if bootloader and driver-level changes are also needed. Also, since DDR type affects power requirements, I would like guidance on the PMIC configuration changes required for DDR3. I want to understand which voltages need to be modified, whe

OS : Ubuntu 24.04 LinuxTarget MCU: STM32F103CI'm new to using STM32CUBEIDE I have noticed when i created the C/C++ project and chose the target MCU something off maybe that is the issuefind the photo down below.I have added an app directory only app/|- main.c|- inc     |- main.h both files are empty i did not write anything yet  just a main function that returns 0 and when i build it says "Error: Cannot find the specified linker script. Check the linker settings in the build configuration.make: *** [makefile:85: fail-specified-linker-script-missing] Error 2" is there something I should configure? or am i missing something?    

Hello everyone,I am currently migrating a project from a Newhaven ATXL series display to their newer ASXP series (both 4.3", 480x272 RGB interface) on a custom board based on the STM32F767.I am trying to isolate the root cause of severe color artifacts I'm seeing, specifically whether this is a Software configuration issue, a signal integrity issue on my Custom PCB, or a potential hardware defect in the display panels I received.The Situation: I have configured the LTDC timings strictly according to the new ASXP datasheet. However, the image is unstable and has artifacts.The "Hot-Swap" Verification: To troubleshoot, I performed a live test to rule out my PCB connections:I initialized the STM32F767 with the new ASXP LTDC settings.Connected the new ASXP screen -> Result: Artifacts/Noise.While powered on, I swapped it with the old ATXL screen.Result: The old ATXL screen works perfectly even when driven with the new ASXP timings.Video of the test:My Question: Since the old screen works

Dear Sir,I am currently using the STM32 NUCLEO H723ZG board with the X-CUBE-ST67W61 expansion. I want to transmit the ADC values from the STM32 board via Wi-Fi. I attempted this using a trial-and-error method but was unsuccessful.Could you please guide me on how to achieve this? I am completely new to working with X-NUCLEO boards.I am sharing my code for your reference. Kindly take a look.Thank you,

Hi,I'm trying to work with the STM32N6. I have a NUCLEO-N657X0-Q board.When I use an external debugger via CN1 everything is fine, however I am experiencing a lot of trouble with the ST-Link.It seems like there is a small (0.01%) chance that attempting to access memory will cause the device to lock up.An example of the sort of command that gets sent to the ST-Link is: `[0xf2, 0x07, 0xfc, 0xff, 0x00, 0x34, 0xcc, 0x35, 0x01]`. That is, a simple command to the ST-Link to read or write memory.I am doing this as part of an attempt to implement support for the STM32N6 for probe-rs, however the problem seems to occur even when using ST tools. For example, the following has a good chance of locking up:./STM32_Programmer_CLI \ -c port=swd \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 Once the ST-Link has locked u

Hi - I'm about to start in on a new motor control application using ST Micro products. Can anyone suggest what a reasonable range of speeds I might be able to get good velocity control over?  This will be a sensored application with high resolution encoders. Maybe 4K-16K counts per revolution. For example, If the maximum motor speed is 4000 RPM will I be able to maintain good speed control down to 400 RPM? 40 RPM? 4 RPM? "Good" speed control might be +/- 5% or so. And the load changes will be small, probably less than 20% or so.Thanks

Content:Hi,I am using UART on STM32G4 in interrupt mode (RXNEIE + NVIC enabled). I observed the following situation:  1. A byte is received → RXNE = 1 2. At that moment, UART interrupt is disabled (critical section) 3. Later I re-enable the UART interrupt 4. But the RXNE interrupt does NOT fire, even though RXNE is still = 1 This causes my Modbus task to freeze because no further RXNE interrupts are generated. ------------------------------------------------------------------------------------------------------------------- My question:Is this the expected behavior?i.e.,Does STM32G4 USART generate the RXNE interrupt only when RXNE transitions from 0 to 1,and not when RXNE is already 1 at the moment the interrupt is enabled? I could not find a clear statement about this behavior in the Reference Manual. If this is the intended design, please confirm, and if possible, point to the exact section in the documentation. Thank you.

I am attempting to reconfigure Pin 8 (datasheet default assignments are PB6/PA14-BOOT0/PC15-OSCX_OUT) from PA14-BOOT0 to PB6 GPIO Output Open Drain (GPIO_MODE_OUTPUT_OD) a short time after start-up.My current attempt (code below) does not accomplish this (instead, once the port pin reconfiguration code below has run, an attached STLINK device can still connect to the MCU, or if already connected to MCU, continues to function.)IMPORTANT: I have not yet and do not plan to change MCU option bytes (using STM32Programmer).Intention: In the application (under development, written in C using STM32CubeIDE, using HAL), at power-up, a connected STLINK device should function normally. A short time later (under condition set in firmware), the application firmware is expected to reconfigure Pin 8 from power-on default (as Port A, GPIO bit 14, Alternate Function 0, which is STLINK SWCLK) to a different configuration (as Port B, GPIO bit 6, Open Drain output).This change should (ideally) be able to o

i am using bluepill board. which PA9,PA10 is connected to header. when i connect FTDI as RX Tx mode  and also i cheked REST status(reset is high if switch not pressed) but cube programmer say exact like you. my target chip is STM32F103C8T6. using clone stlink i found chip id is 0x414 and flash memory is 256Kb which is not according to datasheet of that MCU. 

Hello,I am trying to generate a STM32CubeIDE project using CubeMX (version 6.16.1) for MP157D-DK1 board. It generates some device trees (linux, u-boot, tp-a) but it fails to generate the CubeIDE project.I also tried older versions of CubeMX (as late as 6.12) and none work.The error it displays is attached. Any idea what might be going wrong with the code/project generation? I have STM32CubeIDE v2.0.0 installed.Thanks.

I have both Board "stm32mp257F-dk - F-ev"I try to install chromium on the STM32MP2 , and Successfully installed chromium ,I try to play video on YouTube it is to lagging , smoothly play on 360p only, without YouTube i treid different method to play video on chromium. but also the output same,is there any thing to reslove this issues?My project based of Web display with high resolution video upto 1080p60 fps on HDMI .please give me the update on this, can my project work on this board.

Hi everyone,I’m working with an STM32L5 USART and trying to clarify a point about parity vs. MSB-first transmission.From the reference manual (USART parity control / frame formats), when parity is enabled the frame formats are shown as:M=00, PCE=1: SB | 7-bit data | PB | STBM=01, PCE=1: SB | 8-bit data PB | STBand there is a note that “in the data register, the PB is always taking the MSB position (8th or 7th depending on M)”.This wording caused confusion in our class:one interpretation is that because parity occupies the MSB position in the data register/word length, it might be transmitted before the data bits when MSBFIRST=1.My understanding is:MSBFIRST only reverses the order of the data bits inside the data field.The parity bit remains the parity field in the frame, i.e. logically after the data field and before stop bits.The “MSB position” note refers to the bit slot within the word length/data register, not to the time order on the line.Could someone confirm:Question:When MSBFIR

Heya!I've been borrowing an STLINKV3MINIE and today my own (legitimate) STLINK/V2 arrived today, but I haven't been able to detect it. I purchased the product from Mouser (https://au.mouser.com/ProductDetail/STMicroelectronics/ST-LINK-V2?qs=H4BOwPtf9MC1sDQ8j3cy4w%3D%3D&srsltid=AfmBOooS1jAwuhdu3ZF7xo5hJ7OWAqrWYGnkUSL7hzKZPl6fvURN-Hnq).You can see in device manager, when I have the V3MINIE connected, it shows in the DM panel:When I connect with the V2, my computer does recognise it:I have been using the same USB port on my computer, and I am using the cable that arrived with the V2 to connect it. The red LED on the V2 is on (remains red, no flashing), but I'm getting nothing.When I try connecting to it via STM32CubeProgrammer with the V2, I get nothing (Verb level 3):It does not detect the Serial Number and doesn't show up as something to connect to in the cfg panel:It works A-OK with the V3 as soon as I plug that back in (same settings), but not with my V2.I had downloaded the V2 dr

Case Description:Title: LSM6DSL FIFO data misalignment (XYZ rotated) and FIFO_PATTERN always 0 — how to align reads?Body:I’m using an LSM6DSL over I²C with an STM32. Goal: batch accelerometer-only samples into FIFO and drain clean (x,y,z) triplets at a fixed watermark. I keep running into two issues:Data misalignment — the XYZ triplets appear “rotated”. I’ll get a few normal lines, then a line where one column looks like a big random number (e.g., ~168xx), then it stabilizes again. Example:x,y,z 5, 250, 16870, 17, 258, 16825, -66, 221, 16828, -53, 284, 16834, Sampling End Sampling Start -22, 4, 242, 16846, 13, 281 16830, 51, 230 16882, 39, 242 16850, 11, 258 16803, -14, 220 16843, -24, 232 16855, 0, 241FIFO_PATTERN is always 0 — I expected to use FIFO_STATUS3/4 (FIFO_PATTERN[9:0]) to know which axis comes next and align before parsing, but I always read 0, even when the FIFO is clearly non-empty and STOP_ON_FTH has fired.Hardw

hi,     we use one LSM6DSL sensor to read 3 axis acc FIFO data each second, but after some times, the FIFO out data become misaligned. the sensor setting is below:XL_ODR_26HZGyro disabled.FIFO ODR = 26HzFIFO threshold (water mark) = 128No decimationBDU Block Update enabledFIFO Is in continuous modewe have a timer to trigger to read FIFO data by Zephyr I2C(frequency: 100000bits/s) each second, before data reading, we check the numbers of FIFO by checking FIFO_STATUS1 and FIFO_STATUS2 register, then we read a multiple of 3 axis sets each time, for example if the FIFO data number has 78, we will read all FIFO data one time, if the number is 76 or 77, we only read 75 data one time. it can make sure reading data is complete 3-axis data. firstly, the reading data is the right like as (X_ACC, Y_ACC, Z_ACC). but after some time (the time is not fixed) the data will become (Y_ACC, Z_ACC, X_ACC). we don't know how to fix this issue. please help us.

In the datasheet it is given at 40MHz the max C_L is 8pF (from AN6027), but the C_L in the design schema has C1 and C2 8pF(UM3305), which gives 4pF, could you suggest me with the external crystal oscillator design. And the range is from 4MHz to 40MHz,  so if for a chosen crystal , should the minimum frequency satisfy this condition ?  

Hello,I am using STM32H750VBT6 to perform microSD card write operations. After a number of writes, the CPU sometimes resets during a write operation. At the same time, the Vcore (1.13V) rail shows a voltage drop. The issue is random, but the higher the write frequency, the faster it occurs. Below are details of my hardware, software, and test results. 1. Hardware designThe power supply module:The power supply is designed with 12V input, generating 3.8V, 3.3V, 1.8V, and 1.13V.3.3V powers the STM32 VDD pins, and 1.13V powers the VCAP pins.Each VCAP pin is decoupled with a 0.1 µF capacitor in parallel with a 4.7 µF capacitor (located close, but not on the same plane due to vias).The SD card interface: 2. Software designInitialization code generated by STM32CubeMX + HAL library: void MX_SDMMC1_SD_Init(void) { hsd1.Instance = SDMMC1; hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; hsd1.Init.BusWide = SDMMC_BUS_WIDE

Dear STM32 users and developers, This new thread is back and is dedicated for our technical developers community to share last STM32 updates, the first part will be products documentation news such as datasheets, Erratas, Applications notes  followed by specific subject's presentation(s) during the last period in a monthly basis . The format and the content will evolve in next editions...    You can leave us your comments on this initiative on this thread    Many thanks to @Tesla DeLorean  @TDK  @waclawek.jan   !  Any proposal is welcome for subjects you want to be addressed , Stay tuned . Cheers, STOne-32 

Hello everyone,I’m working on a control unit board based on the STM32F407VETx (LQFP100) microcontroller. During development I noticed that some pins configured as external interrupts (rising edge) were being triggered more often than expected.To better analyze the issue and exclude possible mistakes in my code, I prepared a minimal test project with the following configured pins in IOC:Pin 9 – PC15: GPIO_EXTI15 - INPUT_1Pin 97 – PE0: GPIO_EXTI0 - INPUT_2External crystal/ceramic resonator (HSE)Serial Wire Debug with SysTick as timebase sourceThe only user code added is in gpio.c:/* USER CODE BEGIN 0 */ volatile uint8_t counter_1 = 0; volatile uint8_t counter_2 = 0; /* USER CODE END 0 */ . . . /* USER CODE BEGIN 2 */ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { if(GPIO_Pin == INPUT_1_Pin) { counter_1 = (counter_1 + 1) % 255; } if (GPIO_Pin == INPUT_2_Pin) { counter_2 = (counter_2 + 1) % 255; } } /* USER CODE END 2 */ On my board both PIN9 and PIN97 have the following

Hi,I’m porting the DATALOG2 application fromfp-sns-datalog2\STM32CubeFunctionPack_DATALOG2_V3.1.0\Projects\STM32U585AI-STWIN.box\Applications\DATALOG2to the STM32U575VGT6, but I’m running into issues with the Bluetooth functionality during debugging. Does anyone have any suggestions? The code enters this section:if (ret_status != (ble_status_t)BLE_STATUS_SUCCESS){BLE_MANAGER_PRINTF("Error: HCI_LE_SET_SCAN_RESPONSE_DATA [%x]\r\n", ret_status);goto end_label;}I can erase, read, and program the BLUENRG-M2SA using RF-Flasher Utility v4.5.0, which indicates that the chip is not damaged.The complete project source code is attached.The hardware circuit is as follows:The code is as follows:void set_connectable_ble(void){#if (BLUE_CORE == BLUENRG_MS)char local_name[8] = {AD_TYPE_COMPLETE_LOCAL_NAME,#else /* (BLUE_CORE == BLUENRG_MS) */uint8_t local_name[8] = {AD_TYPE_COMPLETE_LOCAL_NAME,#endif /* (BLUE_CORE == BLUENRG_MS) */ble_stack_value.board_name[0],ble_stack_value.board_name[1],ble_st

Attempting to download the new STM32CubeMX 2.0 (required since not included in STM32CubeIDE anymore) does not work from your site.https://www.st.com/content/st_com/en/stm32cubemx.html# has links all over the page to "Download STM32CubeMX"...Unfortunately all these links have the same problem: a License Agreement comes up, but when I click Accept nothing happens.There's not an obvious way to download in any other way.

Here: https://wiki.st.com/stm32mcu/wiki/Software_development_kit