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i am using cube mx version 6.18.0and cube ide v2.2.0my question is is there a  way to create a new project from an already existing ioc filei don’t want to do all the ioc setting all over again, it will take like hours to do all the settings. 

Hello everyone!   I got the following problem; I need to read from two 32bit addresses and write the data to three. Specifically, i am interested in the case shown in the left side of the image, where the N[0:15] increment by half word and write to the M[0:15] but it will increment by a full word. Don't worry about the reserved bytes in the HTIMx_CC1R, I checked the manual and are always at zero.  I saw that the H7 can read/write with weird patters using the fifo functionality. The thing is I can't understand at all how to set it up. Is there any other better way?   Thanks in advance!  

hi there.I'm trying to CAN transmit on my target board.my board is not to send CAN message on stm32cubeide . but I confirmed that my board send CAN message on mbed.Can I how to send CAN message on stm32cubeide?? I intended CAN baudrate 500kbps, sampling point 75% and my apb1 clock is 18Mhz, HSE is 8Mhz, and my crystal is 8Mhz.below is printf() debug message when my board running and stop.Always debug message show me the message such as below..<Can Send Success: 1<Can Send Success: 2<Can Send Success: 3<Can Send Success: 4<Can Send Success: 5<Can Send Success: 6<Can Send Success: 7<Can Send Success: 8<Can Send Success: 9<Can Send Success: 10<Can Send Success: 11<Can Send Success: 12<Can Send Success: 13<Can Send Success: 14<Can Send Success: 15<Can Send Success: 16<Can Send Success: 17<Can Send Success: 18<Can Send Success: 19<Can Send Failmy source code attached .please check my error...regards..

Hi all,I have a CAN 2.0 network up and running with a F407 and some F103. I added a board with a G0B (fdcan). I couldn't get my hands on a FDCAN-tranceiver. I tried to get it working in classic mode (from repository example) with a CAN2.0 tranceiver. I cannot receive any message.So my question is:Is it even possible to configure the G0B to work with a classic CAN2.0 tranceiver?If yes, what would the FDCAN config look likeThank you in advance!Best regards,Philipp

We are experiencing failures on some of the STUSB4500 IC chips on production boards and from what we can tell, this is due to the power output (VBUS) being shorted to ground. We observed the STUSB4500 chip failing to negotiate PD, and the 1V2 and 2V7 LDO rails are all at 0VDC. This failure also happens on the EVAL-SCS001V1. When we replace the STUSB4500 IC, with a new one, the problem is resolved, which indicates there is no damage to any other component. This issue may be created with an off-the-shelf EVAL-SCS001V1 PCB connected to a 20V/3A source and shorting the output terminals. The datasheet claims to have short-circuit protection, but it seems to not have this. Our design already has output voltage clamping, ESD protection on VBUS, RPP, UVLO, and OVP, and the correct 1uF decoupling caps on the 1V2 and 2V7 rails, which is more protection than the EVAL-SCS001V1 has. What are some design implementations we can make to prevent this?

I've been working on getting the STM32f7-EVAL operational to later on migrate it to STM32F767II. For this we decided to split up functionality into 3 sections, there is a forward facing application that has the main and specific business logic. Currently the main issue is that the CAN bus transmit (polling) is working flawlessly yet the receive (interrupt) seems to be non-functional. RF0R.FMP0 remains at 0x0, while FMPIE0 is set (1). it seems as if CAN_RF0R is disabled for some reason. Even though CAN_RX0_IRQn is enabled.  /* CAN1 interrupt Init */  HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0);  HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);also the notification is enabled:HAL_CAN_ActivateNotification(&canDef, CAN_IT_RX_FIFO0_MSG_PENDING); after the NVIC and CAN are initialized.void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)is the callback that i'm using.I also verified using messages coming into the MCU by scope and logic analyser. There is an additional device attached to the CA

Hello,I'm trying to set up an interrupt when my FDCAN controller received a CAN message. MCU is an STM32G0B1I went into STCubeMX and I enabled these interrupts:This generated some new functions instm32g0xx_it.c:void TIM16_FDCAN_IT0_IRQHandler(void){ /* USER CODE BEGIN TIM16_FDCAN_IT0_IRQn 0 */  /* USER CODE END TIM16_FDCAN_IT0_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan1); /* USER CODE BEGIN TIM16_FDCAN_IT0_IRQn 1 */  /* USER CODE END TIM16_FDCAN_IT0_IRQn 1 */} /** * @brief This function handles TIM17, FDCAN1_IT1 and FDCAN2_IT1 Interrupt. */void TIM17_FDCAN_IT1_IRQHandler(void){ /* USER CODE BEGIN TIM17_FDCAN_IT1_IRQn 0 */  /* USER CODE END TIM17_FDCAN_IT1_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan1); /* USER CODE BEGIN TIM17_FDCAN_IT1_IRQn 1 */  /* USER CODE END TIM17_FDCAN_IT1_IRQn 1 */}This appears to call this function for RX FIFO on 0 and 1 /* Rx FIFO 0 interrupts management ******************************************/ if (RxFifo0ITs != 0U) { /* Clear the Rx FIFO 0 flags */ __HAL_FD

I am currently developing a USB Mass Storage application using the STM32H563ZI with the following architecture:PC ← USB ← NUCLEO-H563ZI ← SD CardThe SD Card and USB Device have both been tested separately, and each works correctly on its own.However, after integrating the two, I would like to use USB MSC to expose the SD Card connected to the STM32H563ZI as a removable storage device on the PC. The PC is currently unable to recognize the SD Card properly.I would like to ask if there is any example code or reference project for the STM32H563ZI that demonstrates USB MSC with an SD Card.Thank.

Hello ST Community,I am working with the STM32H7RS-DK (STM32H7S78-DK) board and trying to program/activate the Open Bootloader using STM32CubeProgrammer.The Open Bootloader .bin file downloads successfully to RAM, but the Init Open Bootloader operation fails with an acknowledgement timeout.Provisionning logs========== Provisioning of OEMiROT boot path===== Application selected through env.bat: ..\..\..\Applications\ROT\OEMiROT_Appli===== Product state must be Open. Execute  \ROT_Provisioning\DA\regression.bat if not the case.===== DTCM/ITCM_AXI_SHARE is going to be forced to 0 for the provisioning steps===== (if needed uncomment DTCM/ITCM_AXI_SHARE lines with the wished value in the ob_flash_programming script).=====Step 0: Preliminary stage   * Define product state value (* default choice)OPEN       [ OPEN | CLOSED* | LOCKED ]: CLOSED   * Define Debug Authentication method (* default choice)       [ CERTIFICATE* | PASSWORD ]: PASSWORDStep 1: Configuration management   * OEMiROT_Config

Hi everyone,I'm working on a battery-powered flow meter application using the STM32L053, and I'm running into a massive, unexpected jump in power consumption.Previously, our device was successfully hitting the 0.0xx mA (around 30µA) range while maintaining our sleep cycle and keeping the LCD on. However, our boards are now consistently drawing between 5.3mA and 6.0mA, and I am struggling to isolate the leak.Application & Setup Details:MCU: STM32L053 (64-pin) Clocking: LSE is disabled. We are relying entirely on the MSI (262 kHz for run mode) and the LSI (~37 kHz) for the RTC and LCD. Peripherals Active in Sleep: LCD Controller: Driving a large custom 7-segment display (GTD2892B). Configured for 1/4 Duty, 1/3 Bias, running off the internal voltage source (VSEL = 0 or tied to 3.3V). LPTIM1: Running asynchronously in the background on the LSI to count flow pulses via an external op-amp (MCP6042). RTC: Set up with the WakeUp Timer to wake the MCU every 100ms to update the flow math a

Hello Dear Community:I am facing the following issue. I generated the project from Cube32MX for STM32C542RCT6.I modified the following lines seems that a bug is present in the AF aka alternate functions. * @file : mx_i2c1.c* @brief : I2C1 Peripheral initializationHAL_I2C_EnableAnalogFilter(&hI2C1); /* ### I2C1 GPIO Configuration ########################### *//* GPIO Clocks activation */HAL_RCC_GPIOB_EnableClock(); hal_gpio_config_t gpio_config; /**[GPIO Pin] ------> [Signal Name] PB8 ------> I2C1_SCLPB9 ------> I2C1_SDA**/gpio_config.mode = HAL_GPIO_MODE_ALTERNATE;gpio_config.output_type = HAL_GPIO_OUTPUT_OPENDRAIN;gpio_config.pull = HAL_GPIO_PULL_NO;gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;gpio_config.alternate = HAL_GPIO_AF4_I2C1; => HERE IS THE MODIFICATIONHAL_GPIO_Init(HAL_GPIOB, HAL_GPIO_PIN_8 | HAL_GPIO_PIN_9, &gpio_config);In the main:/** You can start your application code here*/for (uint8_t addr = 0x08; addr < 0x78; addr++) {if (HAL_I2C_MASTER_Transmi

Hello,I apologize for any obvious questions, but I am new to CAN and STM32 programming. I have written a code that successfully sends CAN messages to a CANalyzer for data interpretation, so I believe I have enabled the CAN portion correctly. My next objective is to send a message from a CANalyzer to the MCU and have it turn an LED on when it properly received the message. I am using an evaluation board (STM32H7B3I-EVAL).I attached a copy of my main.c file.What I would like to know is how to enable an RX interrupt handler so that I can receive CAN data.What do I have to add to the main.c to make that happen?

hi I’m using the board named NUCLEO-N657X0-Q and I want to use feature of FDCANbut I couldn’t find pin map for that where is the pin number for FDCAN? Thanks

Need India FAE contact details for supporting development issues for ST64UWB

User labels for handle structure In STM32CubeMX, the user can define a User Label for GPIO pins.For example:  User Label: LED_REDThis generates:#define LED_RED_Pin GPIO_PIN_5#define LED_RED_GPIO_Port GPIOAHowever, there is no User Label option for handle structures.For example:extern I2C_HandleTypeDef hi2c;extern TIM_HandleTypeDef htim2;extern ADC_HandleTypeDef hadc1;extern UART_HandleTypeDef huart1;Is would be nice to have al user label for a uart, so the application source can refer to that user label. For example:extern UART_HandleTypeDef MY_COM_huart;extern TIM_HandleTypeDef LED_RED_htim;Thanks,

HiI have a question about the current limitation embedded in the RHFL4913, as there is an inconsistency between two information in the last datasheet (Rev22).in the Table 5 (§4), we can find the “Iolim” (overcurrent protection limitation) range defined as 0.8A minimum and 2A maximum. In the §5 (Figures 42 and 43) we can see that the minimum recommended value for “Ish” is about 0.75A. If we divide this value by 1.6 to get the corresponding “Iolim” value, we obtain 0.47A. This is not consistent with the 0.8A value found in the table 5.Can anybody help me with this problem ? Maybe the Figures 42 and 43 are considering “Iolim” instead of “Ishadj” ? Or there is a mistake in the Table 5 ?Thanks for your helpregardsPhilippe PELEGRI

Updated to the latest version and found that VSCode starts very slowly. It was discovered that the problem lies with the STM32Cube.I have exported the startup time of VSCode.The time taken by STMicroelectronics.stm32cube-ide-build-cmake is 335054ms，~6minSTMicroelectronics.stm32cube-ide-core is 23993ms 

Hello ST Team,I am working on a design based on STM32MP257F and would like to better understand the Resource Isolation Framework (RIF) and resource ownership between the Dual Cortex-A35 and Cortex-M33 cores.I understand that peripherals can be assigned to different processing domains, but I am looking for a detailed reference that clearly defines:Which peripherals are typically operated by the Cortex-A35 and which by the Cortex-M33? Is there any official resource ownership matrix available for STM32MP257F? Can all GPIO banks  be assigned independently to either Cortex-A35 or Cortex-M33? Are there any peripherals that are exclusively accessible by one core and cannot be reassigned? How is ownership handled for the following peripherals? GPIO Ethernet MACs USB2.0 / USB3.0 FDCAN I2C SPI / OCTOSPI UART / USART SDMMC DDR Controller GPU / VPU / NPU LTDC / DSI / LVDS ADC / DAC Timers DMA / GPDMA Is there a document showing: Peripheral-to-core mapping Security attribution Trust

Hello,I am using an STM32H7S3 with STM32CubeH7RS HAL [V1.2.1]. SPI5 drives a display over 3-wire SPI with 9-bit frames (the 9th bit carries D/C).With USE_FULL_ASSERT enabled, HAL_SPI_Init() triggers an assert in stm32h7rsxx_hal_spi.c (line 259 in the current GitHub version):if (IS_SPI_LIMITED_INSTANCE(hspi->Instance)){  assert_param(IS_SPI_LIMITED_DATASIZE(hspi->Init.DataSize));  assert_param(IS_SPI_LIMITED_FIFOTHRESHOLD(hspi->Init.FifoThreshold));}In stm32h7rsxx_hal_spi.h, the macro only accepts 8-bit and 16-bit:#define IS_SPI_LIMITED_DATASIZE(DATASIZE)  (((DATASIZE) == SPI_DATASIZE_16BIT) || \                                            ((DATASIZE) == SPI_DATASIZE_8BIT))However:1. RM0477 [rev 10], section 55.3, Table 578 states that for SPI4 and SPI5 the data and CRC size is "configurable from 4 to 16 bits".2. The HAL itself is inconsistent. A few lines below the assert, the runtime check in HAL_SPI_Init() only rejects sizes above 16 bits for limited instances:if ((IS_SPI_LIM

Hello,We are using two ST67W611M1U modules (no on-module antenna; external 2 dBi dipole on MHF4) with an STM32H563ZG host, bare-metal, SPI host interface at 10 MHz (the same behaviour was reproduced at 20 and 40 MHz). AT firmware reports AT version:1.0.0.1 (Sep 4 2025 11:32:47), macsw 1.6.44; we are working from the Web AT Documentation v2.0.106.Topology: one module runs as SoftAP (AT+CWMODE=2, AT+CWSAP="…","…",1,3,4,0, AT+CIPMUX=1, AT+CIPSERVERMAXCONN=3, AT+CIPSERVER=1,5000,"TCP", AT+CIPRECVMODE=1), with two stations attached: a second ST67 module and a Windows PC. Steady-state traffic is about 36 kB/s outbound from the AP to the PC (AT+CIPSEND=<link>,1024, ~40 per second) plus about 10 kB/s inbound from the second module (passive receive, one AT+CIPRECVDATA of ~1 kB per 100 ms).We have collected several hundred boot/join cycles with full host-side logs and would appreciate answers or pointers on the following points.1. Static station IP is never applied to the interface. On the

Hi, I got this PN from the customer, but I didn’t find much information about this PN. I would like to know if the datasheet and 2D/3D is available? 

HiI’m looking for the maximum sink current capability on the OCM pin of the RHFL4913, and I find some inconsistency between two information available in the last datasheet (rev 22 dated of july 2025).At the end of the table 5 (§4) I get a 0.38V voltage value for a 24mA sinked current in the pin. But in the §7.5 I find a 10mA sink current value.Which one can I consider as the maximum sink current value ?Thanks for your help.Regard

Hello,I would like to know when you plan to align your gnu-tools-for-stm32 with Arm GNU Toolchain (15.3.rel1)?Your toolchain is quite old.Or is there a way to use Arm GNU Toolchain (15.3.rel1) instead?It blocks me from moving from CLion (Arm GNU Toolchain 15.3) to STM32CubeIDE for Visual Studio Code. Best regards,Endriu

Hello,We are observing what seems to be unexpected behavior when using the Sharpener feature with an 8×8 autonomous ranging profile in VL53L5.Configuration:- Ranging profile: 8×8 autonomous- Integration time: 60- Frequency: 2- Target order: Closest Our primary target (marked in red) is a surface parallel to the field of view axis. The FoV intersects the surface at approximately 30 mm, which is correctly reported by the Distance measurement.Initial measurements: Sharpener = 0%Signal per SPAD:    6.00     3.00     3.00     2.00     3.00     3.00     2.00     3.00    7.00    13.00    15.00     5.00     3.00     4.00     2.00     0.00   67.00    56.00    43.00     9.00     7.00     6.00     3.00     3.00  131.00   131.00    44.00    18.00    19.00    12.00     7.00     4.00  154.00   142.00    44.00    36.00    38.00    29.00    17.00     4.00  230.00   148.00   105.00    85.00    69.00    55.00    31.00    14.00  303.00   314.00   171.00   120.00   112.00    82.00    48.00    27.00  561.0

Hi,I want to start a custom board design using STM32F405 but later I want to upgrade to STM32F407.Below are the features I want to target.Ethernet (IEEE802.3, TCP/IP< DHCP, MAC, SNTP) Can ethernet (10/100) over SPI interface (W5500) will work for STM32F405?  USB OTG HOST UART x3 Analog 12-16 bit PWM input: at least 10KHz 8-bit Parallel interface for display.Is there any development platform available to cater all these features.Also, please suggest the programming tool as well for production.Let me know if you have any questions.Thanks, Mukesh