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Board: custom STM32N657Z0H3Q (not a Discovery/Nucleo)Flash: Macronix MX25U12835F, 16 MB, Quad (x4), 1.8 V, no DQSTools: STM32CubeProgrammer 2.22.0 and 2.23.0, LinuxWe need to program the external XSPI NOR flash (FSBL + application) using only USB serial boot / DFU, with no ST-LINK connection.This is a product requirement, not a bring-up convenience. On our board, entering development boot requires BOOT1 = 1, and BOOT1 (PA6) is wired as DCMIPP_PIXCLK and actively driven by an on-board FPGA. We cannot reliably force that pin without contending with the FPGA driver. USB serial boot needs only BOOT0 = 1 and BOOT1 = 0, which is the FPGA-idle state, so it is the only strap combination that is safe on this hardware. We attempted to relocate BOOT1 via OTP19 dev_boot_port/dev_boot_pin, and that attempt left the board permanently inaccessible. That is a separate open thread with no resolution so far: https://community.st.com/stm32-mcus-products-25/stm32n657-after-programming-otp19-dev-boot-port-

I am trying to understand the readout protection functionality in the STM32G4 series. When I read the G4 series manual, I get the impression that level 1 protection will protect the flash, option bytes, CCM SRAM and RTC backup registers from JTAG / SWD readout – but curiously not the regular SRAM.Have I understood this correctly?Furthermore, I understand that level 2 will protect the entire chip – but that this is irreversible. So, if I do that to a chip, I can never again use that one for debugging. Not even after a full chip erase, which I’m not even certain that I can perform. As a developer, I see this as pretty much bricking the board.If I am correct that RDP level 1 will not protect the regular SRAM from readout via JTAG or SWD, are there other ways to protect it from JTAG / SRAM probing?

Hi there,I’m using STM32L052 for PWM generation with TIM2.TIM2->CR1 is initialized once at start of the program and never touched again during runtime:TIM2->CR1 = 0x00000081;Even though, in some random cases TIM2->CR1 switches back to 0. How can that happen? How can TIM2->CR1 accidentally switch back to 0? Is there a known issue? I really don’t know how to debug such an error. TIM2->CR1 is the only register that changes randomly.Thanks in advance for your help! 

Hello,I am trying to configure an STUSB4531 using the STUSB4531 GUI and a NUCLEO-C071RB board as the I²C bridge.Following the application note/documentation, I connected the NUCLEO board to my PC and attempted to drag and drop the provided firmware .bin file onto the board's mass-storage device. However, Windows reports that there is not enough free space available on the drive.Details:Board: NUCLEO-C071RB Target Device: STUSB4531 Method: NUCLEO board used as I²C bridge for the STUSB4531 GUI Firmware file size: ~43 KB Available space on the NUCLEO mass-storage drive: only ~7-8 KBWhen I inspect the drive exposed by the NUCLEO board, it appears almost full, leaving significantly less space than the firmware binary size. As a result, the drag-and-drop operation fails.My questions are:Is the firmware supposed to be copied directly to the mass-storage drive, or should it be programmed using another method such as STM32CubeProgrammer? Is the limited reported drive capacity normal for the NUC

HiSetup: LIS2DW12 in I2C mode, with CS and SA0 tied to VDD_IO and RES (pin 7) to GND. VDD and VDD_IO are always on. An ST25DV shares the bus. With the original 100 kΩ pull-ups we measured t_HIGH(SCL) = 3.2 µs, below the 4.0 µs minimum, and edges of about 2.2 µs.The firmware sets SOFT_RESET by read-modify-write on CTRL2 on every sleep cycle, then sets BDU by read-modify-write.Symptom: after some time the sensor stops acknowledging at any address. The ST25DV on the same bus still works. MCU reset and 9 SCL clocks + STOP do not help.Bus already fixed: we replaced the external pull-ups with 10 kΩ, as in Figure 4, and adjusted the I2C timing register. t_HIGH is now about 7 µs and f(SCL) is about 67 kHz, within Table 7.Questions:1. Apart from I2C_DISABLE = 1, what can make the sensor stop responding on I2C until power is removed? Could the previous out-of-spec timing have caused a wrong register write?2. Is a read-modify-write of CTRL2 right after SOFT_RESET safe? Is there a minimum wait tim

Board / softwareSTM32N6570-DK (MB1939), STM32N657X0H3Q STM32Cube FW_N6 V1.4.1, ThreadX + USBX from the package (not X-CUBE) STM32CubeIDE, load-and-run development flow (ELF downloaded into internal SRAM by the debugger; no FSBL, no XIP, no external loader) USB2_OTG_HS configured as Host_HS on CN17, internal HS PHY OTGPHY2 clock = RCC_USBPHY2CLKSOURCE_HSE_DIRECT, 24 MHz HSE crystal CPU 600 MHz, AHB 200 MHz USBX: UX_MAX_DEVICES 8, UX_APP_MEM_POOL_SIZE 98304, USBX_MEMORY_STACK_SIZE 65536, only the CDC-ACM class registeredWhat worksA USB 2.0 mass-storage device (HP, VID 0x03F0 / PID 0x2003) enumerates reliably and repeatedly:[usb] idVendor : 0x03F0[usb] idProduct : 0x2003[usb] bcdUSB : 0x0210[usb] bMaxPacketSize0 : 64[usb] speed : HIGH[usb] state : ADDRESSED[usb] -- interface 0 class 0x08 (mass storage) 0x06/0x50[usb] ep 0x81 BULK IN mps 512[usb] ep 0x02 BULK OUT mps 512UX_DEVICE_ENUMERATION_FAILURE here is e

I'm using SPI1 on an STM32H5E5 in slave mode, with DSIZE = 32 bits, TSIZE=0 and `FTHLV` configured for four 32-bit frames.I'm trying to understand the internal transmit pipeline more precisely.Is the internal TX shift-register width (in bits) or transfer granularity documented anywhere for the STM32H5E5 please?What is the effective width of the TX shift register, and how does data move from the byte-organised TX FIFO into it?I would appreciate clarification of the internal TX FIFO to TX shift register data flow please?For a 16 byte Tx FIFO, assume the TX FIFO is pre filled and full, as transmission begins, data transfers from the TX FIFO into the TX shift register so the Tx FIFO has new space immediately. So the TX FIFO becomes empty before the RX FIFO becomes full. What I'm trying to discover is how many SCLK pulses occur between TX FIFO empty and RX FIFO full. I expected it to be around 32 SCLK's (32 bit) but its closer to 8 SCLK's closer to one byte rather than one word.Any informat

Hello,I am using an STM32N6570-DK and I am seeing an issue when trying to start a TouchGFX application after programming the board.My setup is: STM32N6570-DK TouchGFX Designer 4.26.1 STM32CubeMX 6.18.1 STM32CubeIDE 2.2.0 STM32CubeProgrammer 2.23.0 ST-LINK firmware: V3J17M11 STM32 Debug+VCP I created a new project using TouchGFX Designer 4.26.1. The only additional component I added was a simple colored screen, just to have something visible when the application starts.I then generated the TouchGFX code from Designer and generated the project using STM32CubeMX 6.18.1 for STM32CubeIDE 2.2.0. The complete project builds successfully without any errors.To program the board, I do the following: Set BOOT0 = 0 Set BOOT1 = 1 Press the RESET button Use the LoadAll.bat script located in the project's Flash scripts folder, from the CubeIDE/Debug, to program the application The programming process completes successfully.After programming, I then: Set BOOT1 = 0 Press RESET However

Hello,We are currently implementing the STMicroelectronics PWD5T60 power stage in our SMT production and would like to ask for stencil design recommendations for this package (VFQFPN 12x12 with multiple exposed power pads). [st.com]We are currently experiencing significant solder voiding on the large exposed pads after reflow soldering.Our current process uses:Solder paste: KOKI S3X58-M650 Standard convection reflow processWe are planning to evaluate KOKI HF1200 as an alternative paste, but before starting trials we would be interested in ST's recommendations and experience with this package.Could you please advise:Recommended stencil thickness Aperture design for the exposed power pads Target paste coverage (%) Any specific PCB land pattern recommendations Typical voiding performance observed during qualification Available assembly guidelines or application notes for PWD5T60Has anyone worked with this device and successfully optimized the stencil design to reduce voiding?Any recommend

Hi,we are currently using STM32H745BIT6 208 Pin package, now this package is not recommended by ST for new designs, so we are changing to STM32H745II LQFP 176 pin package.is there a way to import the current project IOC file MCU to new MCU. how to do this. if I do again by creating new project it is a huge work. since we are in a production stage this change in new MCU will cause us several software related problem and it will consume again more time.please suggest how to import current project to new MCU Regards,srinath

Hi,I would like to share a solution that may help others using USBX Custom HID on the STM32H723.EnvironmentSTM32H723 STM32CubeMX 6.17 STM32CubeH7 V1.13.0 USBX + ThreadX USB_OTG_HS (Internal FS PHY) Custom HID 64-byte reports IN and OUTProblemThe device enumerated correctly and received HID SET_REPORT requests.A worker thread processed the received command and sent a response using: ux_device_class_hid_event_set(&hid_event); After the first IN report, the application appeared to hang.The CPU spent nearly all its time inside: OTG_HS_IRQHandler() and ThreadX tasks no longer received meaningful runtime.Debugging ResultsThe following registers were observed:DAINT     = 0x00000002DIEPTSIZ1 = 0x00080040DTXFSTS1  = 0x00000000 This indicated that EP1-IN had a pending 64-byte transfer and the Tx FIFO remained blocked.HAL_PCD_EP_Transmit() returned:HAL_OKbut the transfer never completed. Root CauseCubeMX generated no FIFO configuration for the USB OTG HS peripheral.The following functions wer

We are considering using a WB05KN as a BLE coprocessor in an STM32H573 design.  I found the section in your wiki describing paths for Bluetooth certification.  It says that no testing is required if a precertified module is used, or the recommendations and layout in AN5526 have been followed to the letter.Separately, all intentional radiators (in the US) must pass FCC testing, but if one uses a precertified wireless module and specified antenna, then the incorporating product can simply cite the certification of the wireless module.I want to clarify… are these two sets of testing (Bluetooth qualification as discussed in the ST Wiki, and FCC intentional radiator testing) two different sets of testing entirely?  That is, if we do a chip-down WB05KN design according to AN5526, would we still have to do FCC intentional radiator testing, even though we would not need to perform Bluetooth certification testing?If I’m understanding that correctly, is it then true that the only way to avoid FC

Hello,I am using NUCLEO-U5A5ZJ-Q evaluation board.I have configured ADC1 to do a single conversion and a software start.I want to measure ADC conversion time.My main test code looks like thiswhile(1){    HAL_ADC_Start_IT(&hadc1);            HAL_Delay(1);            HAL_ADC_Stop_IT(&hadc1);    adc_value = hadc1.Instance->DR;    }I have added a test pin for debugging. To check with oscilloscope.I set pin high inside HAL_ADC_Start_IT just before ADC enabled.And I reset pin inside interrupt procedure ADC1_2_IRQHandler.I have connected oscilloscope to ADC input pin directly to see sample begin. As ADC capacitor is connected to input and it has some chargeit is possible to see discharge curve on the screen.Here is the picture. Yellow shows time between start and end of sampling.Blue shows sampling begin (when capacitor is connected).Why there are two discharge curves?I have configured to do only one sample.Also the timing is wrong.I am using clock from external HSE.It is 16MHZ. Di

Hi,On STM32U575CGU3, calling MX_ADC1_Init() once increases the device current by about +200 µA. After that, even if I run HAL_ADC_DeInit(), reset ADC1, and disable VddA, the extra +200 µA current does not disappear.Here is the minimal code:cint main(void){ HAL_Init(); SystemClock_Config(); MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ADC1_Init(); // <-- Base +200uA increase MX_OCTOSPI1_Init(); MX_SPI1_Init(); MX_USB_OTG_FS_PCD_Init(); MX_USART1_UART_Init(); MX_ICACHE_Init(); // ADC Disable HAL_ADC_DeInit(&hadc1); // <-- This does NOT reduce the +200uA __HAL_RCC_ADC1_FORCE_RESET(); __HAL_RCC_ADC1_RELEASE_RESET(); HAL_PWREx_DisableVddA(); while (1) { __NOP(); }}QuestionDoes ADC_Init enable an internal analog bias that cannot be fully disabled by ADC_DeInit, ADC reset, or VddA OFF? Is there any complete shutdown procedure to fully power down ADC/VREFBUF after initialization?Thanks.

Hello,I am currently developing a USB Device application using the STM32N657L0.I am reaching out to ask for advice because I am having difficulty meeting the target power consumption requirement of 5V, 2mA max during USB Suspend state. Our target conditions and system requirements are as follows:VDDCORE uses an external power supply. The USB Driver must be maintained during USB Suspend. The system must be able to wake up and recover via USB. Power consumption must remain below 5V, 2mA during USB Suspend.Currently, when the chip is configured in STOP Mode, the measured power consumption is:VDDA18AON (1.8V): ~5mA VDDCORE (0.81V): ~40mA We are looking for ways to further reduce these currents to meet the 2mA requirement.Could you please guide us on how to optimize the power modes, clock gating, or power supply configurations to achieve this? Any suggestions or reference guidelines would be greatly appreciated.Thank you for your support.Best regards,

I'm in debug mode in STM32CubeIDE.On the SFRs tab in the upper right corner, I want to enable UART4 and check the register status.But I only see UART-related items: LPUART/USART1/USART2/USART3.Why can't I find UART4?My MCU is an STM32C551RCT6.I'm very certain this IC has UART4

I’m making AOI program for STSAFA110DFSPL02 and would like the correct top marking because I couldn’t find it in the datasheet.The received part has SF3C B317 marked in the top side and need to confirm that is correct or not.

For TS972IQT, how to determine whether the DC  is 2013+ or 2023+ ?  thanks~

Good day Sir & Madam, Could you please confirm if MPN STW11NK100Z is free of Dechlorane Plus?We currently have stock with date code 2410 (Year 2024, Week 10). Can you please verify if this specific batch contains Dechlorane Plus?

I am using a STM32H723ZGT6 based custom PCB. The PCB is being soldered using ChipQuick’s TS391LT solder paste and CQ4LF-0.5 no clean liquid flux it is then cleaned using isopropynol (IPA) and an anti-static brush. We are using the hot air gun at 350 C. These are our findings so far with respect to the corrosion issue:There is a pale yellowish gunk deposit near the pins of the micro-controller which i suspect is the flux residue carried by the IPA and getting removed due to small pitch of the IC. The solder mask above the copper layer (specially the ground) underneath the STM chip getting pealed off. The exposed copper getting corroded (as shown in the picture - bluish part under the removed chip) There is an off-white residue under the chip surface in shape of a dried out liquid spot.Since the average humidity of my area is 77% with a peat of about 90% we suspect that the gunk is trapping the moisture and a electrolytic cell is getting completed and hence the corrosion.These Boards wer

Hi STMicro team,On usage of MPN:M24LR64E-RDW6T/2, recent datecode: 102026 (WWYYYY)  , we find below difference:The difference is  C to D change in the chip RFID module :Old Build BoardRFID Memory Code: E0025C9196D23D96 Date Code: 2336 Result: 100% Pass RateNew Build BoardRFID Memory Code: E0025D71B0C4273 Date Code: 2610 Result: Boards Failed During FCT (100%) The customer has requested clarification regarding the change from "C" to "D" in the RFID memory code,.Could you please check with the supplier / STMicroelectronics and confirm the following:Is this only a product code/marking change? Is there any change in component characteristics, specifications, firmware, or functionality compared to the previous build?

We are planning to use the ISM6HG256X IMU sensor in our project, and the hardware schematic design has been completed. However, we require your support and guidance regarding the PCB component placement and layout guidelines for this sensor.I checked your website but could not find the relevant design guidelines document. Could you please share the recommended PCB placement and layout guidelines or any reference design documents for the ISM6HG256X?I have currently referred to the attached link for the PCB layout, but I am unsure whether it is suitable for this specific part. Kindly review it and confirm whether we can follow these guidelines for our design.https://www.mouser.com/pdfDocs/tdk-invensense-an-000393.pdf?srsltid=AU7gw4W_Lzlaxx-gOvdePEKD_s1CUUAuo-9goEXh4Y9QeqimJJdTN617

Hello, I'm developing software for the STM32WBA2. Bonding is a required feature of this project, so I've set the bonding-related parameters as follows: CFG_BONDING_MODE: Bonding mode (0x01)CFG_ENCRYPTION_KEY_SIZE_MAX: 16CFG_ENCRYPTION_KEY_SIZE_MIN: 8CFG_IO_CAPABILITY: Display Yes No (0x01)CFG_MITM_PROTECTION: MITM protection required (0x01)CFG_SC_SUPPORT: Secure Connections Pairing supported but optional (0x01)CFG_KEYPRESS_NOTIFICATION_SUPPORT: Keypress notification not supported (0x00) I've also attached app_conf.h and ble_conf.h.However, when I connect using ST BLE Toolbox and press the Bond button, the Bluetooth connection is lost.What could be the cause?Is it possible to view communication logs using ST BLE Toolbox? Best regards, Gotoda 

The oemirot provisioning tool expects the TrustedPackageCreator_CLI inside the same folder under mac osx silicone of the STM32CubeProgrammer. This yields an error for the provisioning.py script of these examples. So the python scripts won’t work anymore. I guess the development teams did not synchronise this fact.

HelloI am using a Mac. There is software support for stm32cude ide on Mac. But I would like to ask if there is support for Touchgfx application on a Mac.On the website https://www.st.com/en/embedded-software/x-cube-touchgfx.htmlI can not find a link to download the software for Mac.Is there software support for Mac or any other way to run this application? Thank you