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Hello ST,FYI - It appears CubeMX was not updated since DP-FPU capability was added to the STM32N6 data sheets.Regards,Dave

Bonjour,J'utilise la suite CUBEMX et CUBEIDE  pour créer mon projet à partir d'une carte de développement NUCLEO-U575ZI-Q.J'ai réalisé mon projet sur CUBEMX en gardant et validant le BSP de la NUCLEO pour utiliser les leds et surtout le debug via ST-LINK embarqué.J'ai ajouté des IO pour effectuer une maquette avec SPI1 et OCTO-SPI1 plus quelques IO notamment une PWM.Pour commencer j'ai d'abord réalisé un bout de code pour faire clignoter une led (LED_GREEN); à une certaine fréquence réglée par HAL_Delay.Le souci est que cette fonction bloque car le Tick ne semble pas être validé, (HAL_GetTick  me retourne toujours 0)...Je crois pourtant avoir validé les interruptions :Hello,I am using the CUBEMX and CUBEIDE suite to create my project based on a NUCLEO-U575ZI-Q development board.I created my project on CUBEMX, keeping the NUCLEO BSP to use the LEDs and, above all, debugging via the embedded ST-LINK.I added I/Os to create a model with SPI1 and OCTO-SPI1, and a few I/Os, includi

I have set XSPI1 to "Hexa SPI" mode. I'm using EXTMEM_MANAGER to manage the memory. I'm unable to select the setting EXTMEM_LINK_CONFIG_16LINE for "Number of memory data lines". Instead there is a info textbox which says "Active only when XSPI enabled in Hexa SPI mode.". The only available option is EXTMEM_LINK_CONFIG_1LINE. This results the EXTMEM_DRIVER_PSRAM_Init function to fail in the Config switch case, as the only options in the switch case are EXTMEM_LINK_CONFIG_16LINE and EXTMEM_LINK_CONFIG_8LINE.If i manually force the Config to be EXTMEM_LINK_CONFIG_16LINE before the switch case, it seems to work.I believe that i should be able to select EXTMEM_LINK_CONFIG_16LINE with MX if my XSPI is configured to Hexa SPI mode.    

Hi everyone,I'm currently investigating an interesting issue with an STM32F030 and would appreciate some insights.I've noticed that when the processor gets warm, it takes noticeably longer to start up properly and begin executing the main software (takes longer in my bootloader state - displayed via LED). Once it's running, it seems fine, but the boot delay is definitely temperature-dependent.Has anyone experienced this before? I have two main questions regarding this behavior:General Execution Speed: Can the processing speed actually be affected by the heat? Meaning, does the MCU generally execute code slower when warm, or is the clock strictly fixed once running?Startup / Stabilization Phase: Is it more likely that the MCU is just waiting longer during the initial boot phase? For example, could the startup delay be caused by the internal oscillator (HSI) or external crystal (HSE) taking longer to stabilize, or the voltage/POR circuits reacting differently to the temperature?I suspect

We are currently in the early planning stages of developing a PCI PTS/SSF-compliant payment terminal and have selected the STM32U5 series as our target MCU due to its advanced security features (TrustZone, PCROP, HUK, etc.).To ensure we start on the right foundation, we would greatly appreciate your guidance on the following:1. Recommended Software Stack:Which version of STM32Cube_FW_U5 and Trusted Firmware-M (TFM) / SBSFU is currently recommended or validated for security-critical applications like payment systems?Are there any known issues or errata in older versions (e.g., V1.7.0) that we should avoid for certification purposes?2. PCI-Specific Resources:Does ST offer any reference designs, evaluation reports, or application notes specifically tailored for PCI PTS/SSF compliance on the STM32U5 platform?Are there pre-validated secure boot, secure firmware update, or key management implementations we can leverage?3. Documentation & Tooling:Could you share the latest Security Refere

Hello.I'm working on product with LSM6DSO IMU.I have the communication working, but I'm trying to optimize a reading of the FIFO buffer.In the AN5192 document there is sentence: "The wraparound function from address FIFO_DATA_OUT_Z_H to FIFO_DATA_OUT_TAG is done automatically in the device, in order to allow reading many words with a unique multiple read operation." How should I understand this exactly? What is meant by the "unique multiple read"?I tried to read the register first using i2c write-read, and then just do simple reads of 7 bytes in a loop (for number of samples in fifo). It looks like somehow working, but I'm getting wrong data.Using the write-read for each sample works fine, but it is very inefficient. for (int i = 0; i < num; i++) { if (i == 0) { lsm6dso_read_reg(&ctx, LSM6DSO_FIFO_DATA_OUT_TAG, (uint8_t *)&sample, 7); } else { lsm6dso_i2c_read_only(&ctx, (uint8_t *)&sample, 7); }So what is the most efficient way t

Heyho,I'm not a SW / DSP guy, but I have to help selecting a new MCU.Mostly we need gigabit ethernet, SAIs / I2S for audio input.But for some future applications we might need some DSP power for online audio processing, some heavy filtering and FFT stuff.I wonder if the N6 's NPU can help with that. In all the documentation / ads I mostly see graphics applications.

Will this peripheral ever be documented in detail? i.e. registers, interrupts, etc.Or even a lightweight/low level library would be acceptable.We may choose STM32U5 for a product but not if we are forced to use TouchGFX for good performance. 

CubeMX 6.16.1MacOS 15.7.3STM32F469NIHXMultimedia - DSIHOST - Data and Clock Lanes     -  click,click,clickShow Advanced Parameters - checkHS Transmission fine tuning and LP Transmission fine tuningTransmission Delay on Clock Lane and Transmission Delay on Data LanesThese items refer to 2-bit wide fields in DSI_WPCR1 but CubeMX allows values from 0-10, which would be 3.32-bits wide. By setting the clock transmission delay to, say, 10, the data clock delay gets overwritten as well. Data delay overwrites the low power clock delay, and so on.The actual data range for these items should be [0,3], and HAL_DSI_SetSlewRateAndDelayTuning should probably sanitize the parameter Value before using it.

Hello, We appear to be experiencing a severe code generation bug with CubeMX. After naming and sizing application regions in the memory management tool, what used to generate a correct linker script now generates bad output.Upon generation the linker script STM32U575XX_FLASH.ld now shows:/* Specify the memory areas */ MEMORY { RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 768K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /*start of MX regions Auto-generated By STM32CubeMX*/ RAMBK (rw) : ORIGIN = 0x20000000, LENGTH = 768K RAM4 (rwx) : ORIGIN = 0x20000000, LENGTH = 768K SPIFLASH (rwx) : ORIGIN = 0x08000000, LENGTH = 2048K /*end of MX regions*/ }Given that we cannot downgrade the IOC and have performed more work this is an awkward situation and we will manually manage regions in the meantime. This was not an issue before. Please advise what may be going on. Host: OS X 26.2CubeMX: 6.16.1Target: STM32U575xx  

I am using STM32U575ZIT6QU Microcontroller to measure voltages on 4 analog channels. The 4 channels are configured as Injected Channels. In the RM0456 reference manual, for STM32U5 series, I am unable to find information about using GPDMA with ADC Injected conversions. Is it possible to use ADC Injected Conversion with DMA?

Oh boy, I'm frustrated...Just when I thought I found the right MCU with the N6 (multi-channel audio over gigabit ethernet), I find in CubeMX and the datasheet that SAI2_SD_A and ETH1_CLK use the same pin. And I need both SAIs completely.Very frustrating.Using some I2S might be a solution, but these cannot be synced internally, aside from some other helpful features the SAIs have.So, any other ideas, or will there be other packages where this pin-sharing problem might be solved? 

I am using cubemx to generate a CMAKE project for a NUCLEO_144 based board (NUCLEO_H563).Project generation creates a cmake/stm32cubemx/CmakeLists.txt file that generates a macro define "USE_NUCLEO_144".it also auto creates a stm32h5xx_nucleo_conf.h file that also creates the same define: /** @defgroup STM32H5XX_NUCLEO_CONFIG_Exported_Constants Exported Constants  * @{  *//* Nucleo pin and part number defines */#define USE_NUCLEO_144/* #define USE_NUCLEO_64 */ This creates a duplicate redefinition warning upon build in many places as this header is included throughout my project in many places.This is extremely annoying.I can suppress the warning by adding: #if !defined (USE_NUCLEO_144)#define USE_NUCLEO_144#endif /* USE_NUCLEO_144 */ to the stm32h5xx_nucleo_conf.h filebut of course, this change gets wiped out upon next cubemx code regeneration. It would be so helpful if this guard was included if whatever mechanism you use to generate the _conf.

Dear STMicroelectronics,This is a bug report on the UI for STM32CubeMX 6.16.0 running on Windows 11 Pro 25H2.Please report this internally so that it may be fixed in some future version. Steps to reproduceStart STM32CubeMXFile / New ProjectSelect MCU STM32H563RIT6Click button Start ProjectSelect with TrustZone activated and click OKUnder Categories, expand Middleware and Software PacksFor ThreadX, click the greyed out radio button in column M33NSClick it againExpectedThe popup is readable.ActualAfter the second click, the popup is shown partially obscured by the table and is not readable.If you select the row for ThreadX and click the radio button you can get the popup very much obscured - see attached screenshot.Further infoThe screen resolution doesn't seem to affect the behaviour.I have also reproduced this problem when running the Linux variant of 6.15.0 on Debian bookworm.     Best regards, Jesper 

Split from this thread. Yes, but No!CubeMX V6.16 now allows only exactly 32 TX Buffers ((TX Buffer Nbr + TX Fifo Queue Elmts Nbr) == 32).But less then 32 TX Buffer is allows by the Hardware, and some times, required if You want to maximize the RX Buffers.

There's a bug in latest STM32CubeMX v6.16.1. When enabling RAMCFG for Appli on STM32N6 MCU, the IOC file becomes unloadable.I attached the demonstration IOC file. I created new project for STM32N6570-DK board, enabled RAMCFG peripheral for Appli, checked the AXISRAM3-6 areas, defined single continuous area for those SRAMs in MMT and saved the project. After this CubeMX fails to load this IOC file. I get popup:In textual form the error is: Cannot invoke "com.st.microxplorer.mcu.memorymap.MemoryMapService.getInRangeAppRegions(long, long, com.st.microexplorer.mcu.Context)" because "this.mMemoryService" is null.The workaround is to not enable RAMCFG in CubeMX, rather control the peripheral manually.

Hi everyone,I am attempting to set up the new CubeMX version (6.16.0) inside a Docker container, but I am running into issues.Setup:Base Image: Ubuntu 24.04Target Software: STM32CubeMX 6.16.0Goal: Headless installation (auto-install), since CubeMX is no longer bundled with CubeIDE 2.0.0.The Issue: The headless installation fails. According to the User Manual "UM1718", this mode should still be supported. However, the installation process differs from the manual and aborts with an error. Note: The current manual still uses version 6.11.0 in its examples.What I have tried so far:Verified with v6.11.0: I tested the headless installation with the older version 6.11.0. This works perfectly and follows the manual exactly.Quiet Mode: I tried installing v6.16.0 using the -q operator, but this triggers an error as well.Error Log: I receive the following output/error trace:user:/# ./SetupSTM32CubeMX-6.16.0Check exe path on linuxFullExe path1 is: /SetupSTM32CubeMX-6.16.0Exe path is: /Search java

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Hello there! I'm new here. I’ve just started working on my master thesis, which involves the STM32N6 and an image sensor.From what I've heard from colleagues, working with a camera that lacks a proper datasheet or driver can be frustrating. To avoid falling into the same trap, I’ve been searching for cameras/modules compatible with the STM32N6 that I can get up and running.Here's what I'm looking for:I need to capture images (video is not a priority) in daylight (IR filtered).Once sunlight fades, I will activate my IR illumination and take IR-only images. RGB should ideally be blocked to avoid mixed images. My two approaches so far:1. RGB Camera with Motorized Filter (e.g. RaspberryPi IR-Cut, motorized): It uses a clear filter and an IR-cut filter. The clear glass could potentially be replaced with an RGB-blocking filter.2. Dedicated RGB-IR Sensor: I came across Omnivision sensors and, later, ST’s own options. Here’s where things get tricky:The Omnivision sensors don’t s

Hello,Our project is based on the STM32WBA65MI, and we have an external flash chip on the board that we use STM32CubeProgrammer w/a custom external loader to program. This worked well with STM32CubeProgrammer v2.20, but when I updated to STM32CubeProgrammer v2.21, suddenly I was unable to connect to the board using the external loader.This happens as soon as I select the external loader andIf I select verbosity level 3, this is what I see:08:50:10:520 : Selected loader: C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin/ExternalLoader/MX25R6435_STM32WBA65-LEGATO.stldr 08:50:10:520 : Error: Flash loader C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin/ExternalLoader/MX25R6435_STM32WBA65-LEGATO.stldr cannot be loaded.Here's the StorageInfo:struct StorageInfo __attribute__((section(".Dev_Info"))) const StorageInfo = { "MX25R6435F_Legato", // Device Name + version number SPI_FLASH, // Device Type 0x00000000, // Device Start Address 0x800000, // D

Title edited - originally said, "sharing data between two boards" Good day y'all, I'm trying for the first time to have the two cores on a H7 board share data between one another on shared memory, in particular cm7 writing data and cm4 read it. From what I understand I need to use a semaphore to signal back and forth to alert the cm4 when there is new data in every iteration, the theory I get, but I'm not sure of the shared memory allocation and the semaphore correct availability. Is there any example code I can see to understand how it's supposed to go? I tried looking at the ide examples, but anytime I try to open the example folder the ide application just dies :\  Thx all for the advices,  P.S. I'm also using FREERTOS but it's not supposed to cause any problem but you never know 

I want to set the BOR_LEV of H523 to 1. If you have any good ideas, please let me know.

Hi everybody, I'm using a custom PCB which is build upon a STM32L431CBT6 MCU. When connecting to the CUBE Programmer i had this error:Error: Database: There's no active configuration for this device. All the 1 configurations are disabled!Then, i confirmed the issue arose from the DeviceID 0x435 .xml file not having the 128K flash memory settings. What i did is code it myself like this:<!-- JTAG_SWD Interface --> <Interface name="JTAG_SWD"> <Configuration number="0x0"> <!-- 256KB--> <FlashSize> <ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0100"/> </FlashSize> </Configuration> <Configuration number="0x1"> <!-- 128KB--> <FlashSize> <ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0080"/> </FlashSize> </Configuration> </Interface> <!-- Bootloader Interface --> <Interface name="Bootloader">

Hi, I am trying to debug my STM32N6570-DK board, i followed the steps listed under 4.1.3 (Debugging the application) in the getting started instruction list (https://www.st.com.cn/resource/en/application_note/an6265-getting-started-with-stm32n6-mcus-in-stm32cubeide-stmicroelectronics.pdf). When i try to debug the application, it starts normally (code uploads to the external memory), but when i click resume to start the program, the debugger loses connection and eventually exits debug mode. The program I am trying to debug was made using TouchGFX, it's configured as an FreeRTOS project. This is the output the debugger gives to me:Starting server with the following options:Persistent Mode : DisabledLogging Level : 1Listen Port Number : 61234Status Refresh Delay : 15sVerbose Mode : DisabledSWD Debug : EnabledInitWhile : EnabledWaiting for debugger connection...Debugger connectedWaiting for debugger connection...Debugger connectedWaiting for debugger connection...Target is not respond

Hi, I'm designing a driver using 3x STSPIN9P12 to drive a Permanent Magnet Synchronous motor (PMSM).  I have a ADC connected to the SNSO outputs to measure current and I am controlling the current in the MCU's control loop.  I am not using the COUT and VREF pins.Can / should VREF be tied to GND?I think the TOFF pin does not exist on this version.  Do I leave TOFF floating?  or should TOFF be tied to GND?Jon