Join discussions in the Product Forums. Ask questions, learn from your peers, and share insights on ST solutions to accelerate your design journey.
Most recent activity
I try to start working sdMMC with DMA. When D-Cache is not active work well. But when turn it on stop work. Probably need to create MPU region , but where is located used RAM from sdMMC. And if need, how to change .ld file?
Currently designing a PCB that has a USB-C 16 pin connector. For maximum flexibility the PCB can take either a H723 or a F723 MCU. (The H723 has USB FS pins only, whereas the F723 also has USB HS pins available). This design allows it to operate in either USB in FS or HS modes but with only a single USB C port. 1 - What is best practice for wiring up the STM32 USB ID pin (FS or HS) in a USB-C scenario? Do I leave it floating, grounded, or does it need to be connected to one or both of CC1\2 ? 2 - Regarding USB connectivity, can I connect in parallel the following MCU pins (since both sets are inputs to the STM MCU) pin 69 (FS_ID) to pin 51 (HS_ID)? pin 68 (FS_VBUS) to pin 52 (HS_VBUS)? 3 - For question 2, when using a H723 MCU, pins 51 & 52 would be configured as GPIO inputs. When using a F723 either USB mode could be used, so its possible pins 68 & 69 would be configured as GPIO inputs instead. Would this parallel connectivity idea adversely affect FS_ID a
Hello guys, I am trying to build an SDK for my STM32MP1 project using Yocto (Poky) on Ubuntu 24.04. When I run:bitbake core-image-fridge -c populate_sdkI get the following dependency errors: Problem: conflicting requests- nothing provides libcrypt.so.1()(64bit) needed by nativesdk-gcc-arm-none-eabi-14.2-r0.x86_64_nativesdk- nothing provides libncursesw.so.6()(64bit) needed by nativesdk-gcc-arm-none-eabi-14.2-r0.x86_64_nativesdk- nothing provides libpython3.8.so.1.0()(64bit) needed by nativesdk-gcc-arm-none-eabi-14.2-r0.x86_64_nativesdk- nothing provides libtinfo.so.6()(64bit) needed by nativesdk-gcc-arm-none-eabi-14.2-r0.x86_64_nativesdk I tried to install each one of them and the issues still persist
Dear ST Support Team,I am currently working on a binary voice classification task on the STEVAL-STWINBX1 (for example, “echo” vs “other”) using NanoEdge AI Studio 5.0.2, and I would like to ask for your advice.My workflowData collectionI use STEVAL-STWINBX1 to collect voice data.Each sample is 1 second long.I collected more than 200 samples per class.Data acquisition firmware:fp-sns-datalog2\fp-sns-datalog2\STM32CubeFunctionPack_DATALOG2_V3.1.0\Projects\STM32U585AI-STWIN.box\Applications\DATALOG2Dataset conversionI use batch_to_nanoedge.bat to batch-convert the collected files into NanoEdge-compatible format.Training in NanoEdge AI Studio 5.0.2I import the converted data into NanoEdge AI Studio 5.0.2Perform Data Management (DM)Train a classification modelMany generated models show accuracy above 97% in StudioDeployment to MCUI deploy the generated library to the MCU following this ST wiki page:https://wiki.st.com/stm32mcu/wiki/AI:How_to_create_a_current_sensing_classifier_using_NanoEdg
Hello,I am working on the X‑CUBE‑AZURE TFM_Azure_IoT example for the B‑U585I‑IOT02A board and would like to replace the default UART loader with CAN and USB loaders. While the non-secure loader boots and runs correctly, the non-secure interrupts for FDCAN and USB do not trigger. In the application, both peripherals work with interrupts, but in the loader, they do not.To make this change, I modified the loader's non-secure application size to accommodate the FDCAN and USB stacks. However, I am encountering issues with interrupts not firing.I have verified that FDCAN works in polling mode in the non-secure loader application.Environment:Board: B‑U585I‑IOT02A (STM32U585)X‑CUBE‑AZURE: TFM_Azure_IoT (v2.3.0)Toolchain/IDE: STM32CubeIDEWhat I've tried:Adjusted the non-secure application size to fit the CAN and USB stacks.Ensured the peripherals are initialized in the non-secure context.Checked the interrupt enablement for CAN and USB, but no interrupts are firing.Thanks in advance!
As I said before, several issues mentioned in post https://community.st.com/t5/stm32-mcus-products/missing-section-irtim-in-stm32u0-rm-and-more/td-p/667127, were not fixed.And I have more.STM32F0:1. RM0091 page 184 and table 27: Missing SYSCFG_ITLINE31 register with USB bit.2. RM0091 page 629: There is a register RTC_OR with RTC_ALARM_TYPE and TSINSEL[1:0] bits. But it is missing register description before section "25.7.17 RTC backup registers (RTC_BKPxR)". On STM32L0 RM this register is named "RTC option register".3. RM0091 page 613: "This register is write protected (except for RTC_ISR[13:8] bits)." Bits [13:8] should be [15:8]. STM32G0:1. RM0444 page 165: Register RCC_AHBSMENR should be RCC_BDCR.2. RM0444 page 75: Mentions HPREF bit, but it doesn't exist. STM32U0:1. RM0503 page 162: Register RCC_AHBSMENR should be RCC_BDCR.2. RM0503: Missing IRTIM IR_POL bit in SYSCFG_CFGR1 register.3. RM0503 page 61: TIM1/15 should be TIM1/15/16.4. RM0503 page 64, typo: '32 bytes x
Hi everyone, I’m new to STM32 development and need some help configuring CLion for working with STM32 microcontrollers. I have installed STM32CubeMX (version 6.13.0) and am trying to generate a project for my STM32F411CEU6 microcontroller. However, I’m encountering an issue where the Eclipse launcher fails to work, and I can’t proceed further. I’m using macOS Sequoia (version 15.2). Could anyone guide me through the process of setting up CLion on macOS to work with STM32? Any advice, steps, or resources would be greatly appreciated! Thanks in advance!
Hello, I work on quality control for a company and I need to create an instruction of incoming for the item PN LSM6DSOXTR, but I can't find any documentation about the topmarking of this item.It is mark on the item S4QR CODE504Is the "S4" the marking for LSM6DSOXTR ?I believe that S4 is the top marking for the LSM6DSOXTR but I need to find the oficial information that explain that. ThanksBruno M.
I'm working on STM32MP257F-DK board. I use a device tree without SD card, only eMMC. I set BOOTDEVICE_LABELS = "emmc" in my machine.conf.When I want to program I have the following error: ~/workspace/ninja/out/release-v0.0.0-16-gcd0ce3d-dirty/images/cg-stm32mp257f-dk-emmc (amo/work)$ STM32_Programmer_CLI -c port=usb1 -w flashlayout_cg-image-core/optee/FlashLayout_emmc_stm32mp257f-cg-stm32mp257f-dk-emmc-mx-optee.tsv ------------------------------------------------------------------- STM32CubeProgrammer v2.21.0 ------------------------------------------------------------------- USB speed : High Speed (480MBit/s) Manuf. ID : STMicroelectronics Product ID : DFU in HS Mode @Device ID /0x505, @Revision ID /0x2000 SN : 004500464236501300333258 DFU protocol: 1.1 Board : -- Device ID : 0x505 Device name : STM32MP23xx/25xx Device type : MPU Revision ID : -- Device CPU : Cortex-A35 Start Embedded Flashing service Opening and parsing file: tf-a-stm32mp257f-cg-stm32mp257f-dk-
I created an issue on github here, but wanted to post here as well for visibility.Copied below are the details of this linked content: Describe the set-upCustom hardware for our internal product.STM32L496.HAL version 1.13.5.2 devices on I2C bus, HTU21D and PCA9535.Describe the bugSome processors through our production have been coming across errata 2.19.4: The HAL does not seem to address this errata and the timing for I2C transactions begin failing after the bus error occurs.Sometimes it has led to the I2C bus locking up because the components on the bus (besides the processor) are stuck waiting for a transaction to finish (the device responds properly with ACK/NACK or correct data when the bus error occurs). We have created some messy workarounds that do not fully solve this issue.Additional contextThe following is a diff of the changes I made to address the problem:diff --git a/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c b/STM32L4xx_HAL_Driver/Src/stm32l
Hello, I'm trying to DFU update some binaries into 1Mbyte STM32WB55CG Flash with OpenBootloader Custom APP. I've tried before with NUCLEO-WB55RG board without any problem, but with CG I just can erase/write until the first Block (512KB) of the memory. Always crashes from there. I've checked the option bytes and FUS parameters and everything looks normal. I don't know if you have some idea why this behavior. In the post attached some captures. I've got this contact @Alan PORTE from a colleague, but any help will be welcome. Thank you. FUS/NUCLEO-WB55RG FUS-WB55CG OB/WB55CG OB/NUCLEO-WB55RG DFU-ERROR Sergi
Hello ST Community,I’m using an STLINK-V3MINIE and I’m trying to fully understand the hardware on the probe PCB.On the bottom side of the STLINK-V3MINIE PCB there is an unpopulated footprint labeled “CN5” (small pad footprint). I could not find any mention of CN5 in the user manual as a user-accessible connector, so I’m not sure whether it is factory/test/service only or an optional header.I attached:A photo showing the location of CN5 on the PCB (bottom side).What I measured so far:CN5 pad 3 is GND (confirmed by continuity to USB shield / known GND).Questions:Do you know what the intended purpose of the unpopulated CN5 footprint is on STLINK-V3MINIE?I’m wondering whether it’s mainly for factory test / service, or possibly a reserved footprint for a future accessory / variant, or an internal option used during manufacturing.If CN5 corresponds to a functional interface, would it be possible to share the signal names / pinout (pad 1..4) to the extent you are allowed to?Even a high-level
I was just wondering if there was a suitable communications shield that I could use for my NUCLEO H753ZI development board, preferrable if I also use the X-NUCLEO-GFX02 LCD Shield on top.I've looked almost everywhere but there was no single solution for what I wanted:* RS232 with full handshake support (3T5R)* RS485 support for both half- and full duplex* RS422 since this looks very much like RS485 full-duplexOther nice-to-have features would be fully configurable either by jumper setting or MCU control, various testpoints that are easily accessible, and could handle both 5V and 3,3V input voltage.Since I couldn't find anything that even came up close to what I was looking for, I thought of designing one myself! :)What I came up with was a shield that has been build around the TI THVD4431 chip that has support for all three protocols and is easily configurable by selecting corresponding pins to set high or low.After some tweaks and modifications, I managed to create a board that is abo
HiWhen searching and filtering in the PRODUCT SELECTOR I find that accoring no one of the STM32H7R3 MCUs have UART, USART, SPIetc. It also shows that STM32H7R3V8T6 has internal SMPS, but in the datasheet it does not krØystein
STM32H753 @ 480MHz32bit SDRAM @ 125MHzLTDC clock @ 40.8MHz, 800x480 display, RGB565I increment a counter in the LTDC error interrupt when there is a FIFO underrun.That value will be 0 for >2 weeks. Then, one day, it will thousands of times every second. And of course, the display is erratic, glitchy, completely messed up.This is pretty reproducible as well. When I reboot the hardware, it will run for 18 days or something without issue, and then it happens again.I am at my wits end with this one... anyone have any clue whatsoever as to what could be happening here?
Dear STMicroelectronics Technical Support Team,I am currently working on reliability calculations for a design that incorporates the A3G4250D gyroscope. For accurate thermal and lifetime analysis, we require the following parameters:Maximum junction temperature (Tj max)Junction-to-ambient thermal resistance (RθJA)Junction-to-case thermal resistance (RθJC), if availableAny additional thermal characterization data relevant for reliability modelingWe have reviewed the available datasheet but were unable to locate detailed thermal resistance values necessary for our calculations.Could you please provide this information or direct us to the appropriate documentation?
Hi,I can´t find the QConn_flash tool for the ST67W61....Best regards,Achim
The HSEM option is not found in "System Core" in STM32CubeMX (version 6.15), and the configuration option for HSEM interrupt is only found in NVIC. How to configure HSEM in STM32CubeMX. When I selected the LL library environment, the generated source code did not import the HSEM LL library header file. How to solve these two problems? If it is not possible to configure and import the HSEM related library files into the project file in STM32CubeMX, please let us know.
I want to implement a USBPD sink application with a 9V PDO and I am struggeling to set up a PD-contract with a source. I am using following components:STM32G0B1 MCUTCPP03-M20 PD controllerMy project is based on this example: https://github.com/STMicroelectronics/x-cube-tcpp/tree/main/Projects/NUCLEO-G071RB/Applications/USB_PD/DRP1M1_DRPX-Cube-TCPP v4.1.0 When I attach a PD-source, the DPM_Params[_port].PE_IsConnected variable is successfully set.After that I get in USBPD_DPM_Notification a USBPD_NOTIFY_POWER_STATE_CHANGE event and afterwards a USBPD_NOTIFY_HARDRESET_TX event.I also notice that I do not receive a message within PORTx_IRQHandler, as I do not jump intoif (UCPD_SR_RXMSGEND == (_interrupt & UCPD_SR_RXMSGEND))…Do you have any tips for me where I can start looking for my missing piece? Did i initialize something wrong?
Hi Team,I have an application running on touchgfx with STM32H750B-DK board, currently the display which comes along with this board is around 4 inch, but the requirements are 7 inch. Please help me to choose the display to integrate with the board. I'm currently in India. Regards,Siva
New question moved from this post. @mƎALLEm Hey! Thanks for the quick response. I saw your post from a previous thread with a same question but for the STM32F407VG.https://community.st.com/t5/stm32-mcus-products/stm32f407vg-adc-injected-channel-with-dma/td-p/652531 Is the DMA Peripheral in STM32F407VG same as GPDMA Peripheral in STM32U5? The STM32U5 Series has a GPDMA Peripheral which looks to be different from the F4 DMA.Thanks!
Hello, I trying to use DMA on USART6, but in handle list USART6 is unavailable: I ques what there is some CubeMX error because in stm xxx_hal_dma.h file this uart is added to list: #define GPDMA1_REQUEST_USART6_RX 117U /*!< GPDMA1 HW request is USART6_RX */ #define GPDMA1_REQUEST_USART6_TX 118U /*!< GPDMA1 HW request is USART6_TX */ For now I will try to setup manually, but I still on question about this issue ?
Hi,Both Region 1 and Region 2 are configured with ALL READS/WRITES access permissions.The resulting initialization code is as follows: /** Initializes and configures the Region 1 and the memory to be protected */ LL_MPU_ConfigRegion(LL_MPU_REGION_NUMBER1, LL_MPU_INSTRUCTION_ACCESS_ENABLE|LL_MPU_ACCESS_INNER_SHAREABLE, LL_MPU_ATTRIBUTES_NUMBER1, 0x08030000, 0x0807FFE0); LL_MPU_EnableRegion(LL_MPU_REGION_NUMBER1); /** Initializes and configures the Region 2 and the memory to be protected */ LL_MPU_ConfigRegion(LL_MPU_REGION_NUMBER2, LL_MPU_INSTRUCTION_ACCESS_DISABLE|LL_MPU_ACCESS_INNER_SHAREABLE, LL_MPU_ATTRIBUTES_NUMBER0, 0x20010000, 0x20043FE0); LL_MPU_EnableRegion(LL_MPU_REGION_NUMBER2);The second parameter should also include the LL_MPU_REGION_ALL_RW attribute but it is missing.The .ioc configuration file is attached.
Hello,With CubeMX version 6.16.0 and FW package version STM32Cube FW_N6 V1.3.0, the GPIO configuration's are missing from the generated HAL_I3C_MspInit and HAL_I3C_MspDeInit functions in stm32n6xx_hal_msp.c, when I3C is set to application context.Application context stm32n6xx_hal_msp.c/** * @brief I3C MSP Initialization * This function configures the hardware resources used in this example * @PAram hi3c: I3C handle pointer * @retval None */ void HAL_I3C_MspInit(I3C_HandleTypeDef* hi3c) { RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; if(hi3c->Instance==I3C2) { /* USER CODE BEGIN I3C2_MspInit 0 */ /* USER CODE END I3C2_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I3C2; PeriphClkInitStruct.I3c2ClockSelection = RCC_I3C2CLKSOURCE_CLKP; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } /* Peripheral clock enable */ __HAL_RCC_I3C
Subject: Linker Error: Multiple definitions of BLE assembly modules when using CubeMX v6.16.1 CMake generator on STM32WB09Environment:MCU: STM32WB09CubeMX Version: 6.16.1Toolchain: CMake / arm-none-eabi-gcc 14.3.1IDE: VS Code with STM32CubeIDE Extension v3.7.0Middleware: STM32_BLE (Bluetooth LE Stack)Description: I am experiencing a linker failure when building a project generated with STM32CubeMX using the CMake toolchain option. While the project compiles and links correctly when using the standard STM32CubeIDE (Eclipse-based) workflow, the CMake-based build in VS Code fails during the linking stage.The linker reports multiple definitions for several symbols located in the BLE Middleware assembly files. It appears that the same source files are being compiled into different targets and then linked together, causing collisions.Key Error Logs:[main] Building folder: C:/Users/reginaldo.lopes/Desktop/ble_test/build/Debug [build] Starting build [driver] NOTE: You are building with preset
ST Community highlights – April to June 2026
Already have an account? Login
No account yet? Create an account
Enter your E-mail address. We'll send you an e-mail with instructions to reset your password.