Join discussions in the Product Forums. Ask questions, learn from your peers, and share insights on ST solutions to accelerate your design journey.
Most recent activity
The image sensor inputs a 24 MHz clock and outputs a 40 MHz clock, and the captured image size is 1280×1024×2. When the trigger mode of the image sensor is enabled, the main loop execution speed slows down by approximately 1.6 seconds; when the trigger mode is disabled, the system operates normally. Furthermore, I intend to transmit the images collected by DCMI via USB, but these two modules cannot be enabled simultaneously. Additionally, when the DCMI is operating, serial port interrupts will cause abnormal operation of the DCMI. How should I resolve this issue? Below is the configuration code and main loop code of my STM32H743:
I found more issues. 1. Missing SRAMEN bit in RCC_AHBENR register. I think it is bit 9. See STM32U0 RM0503 page 54, RCC_AHBSMENR register and STM32F0 RM0091. With this new bit, reset value is: 0x0000 0300Also I think that it is missing SRAMRST bit in RCC_AHBRSTR register. It should be bit 9. This problem is also on STM32G0 and STM32C0 RMs. 2. Missing TIMx_OR2 and TIMx_OR3 registers mentioned on RM0503 page 553.This problem is also on STM32G0 RM0444 and RM0454, and STM32C0 RM0490. 3. STM32F0 RM0091 didn't mention how internal break input (called "Internal break event sources") is selected. See pages 359 and 514. STM32F0 RM0091 doesn't have an equivalent to STM32U0 RM0503 figure 164 on page 592. 4. STM32U0 RM0503 pages 107, 108 and 118, mentions pin PE6 but it doesn't exist in datasheet. RTC_TAMP3/TAMP_IN3 is pin PB15 and not pin PE6. From STM32U0 DS:TAMP_IN1 PC13TAMP_IN2 PA0TAMP_IN3 PB15TAMP_IN4 PC5TAMP_IN5 PA1 5. STM32U0 RM0503 page 413: Missing description of VREFBUF_CCR regist
Is there any alternative of "B-CAMS-OMV" to use with "STM32F746G-DISCOVERY" as in my region it is not available and the cost will be huge if I want to ship it to Bangladesh. So, is there any alternative modules that I can search for?
I imported a model into STM32Cube AI Studio and tried to run it in On Target mode, but I encountered an error as shown in the attached file. What might be causing this issue?
Hi everyone,I’m having an issue connecting my STM32N6570-DK board to STM32Cube.AI Studio.The board is detected correctly by my computer, and I can see the COM port in Windows Device Manager. However, when I open STM32Cube.AI Studio and go to Board Settings, the COM port list is empty, so I cannot select the board.Here is what I have already checked:The board is connected via USB and recognized by Windows.The COM port appears normally in Device Manager.I set the board to DEV mode with Switch 1 = HIGH.I restarted STM32Cube.AI Studio and reconnected the board.Despite this, the COM port does not appear in the Board Settings dropdown in STM32Cube.AI Studio.Has anyone encountered this issue before with the STM32N6570-DK or similar boards?Is there any additional configuration or driver required for STM32Cube.AI Studio to detect the COM port?Any help would be greatly appreciated. Thanks!Best regards.
There is a problem with saving assembler source files when the C/C++ > Editor > Save Action > Format source code option is enabled:As a result, the file is not saved, and when it is just created, there is no file at all. It's quite irritating, especially because this is quite an old bug and no one has resolved it yet.
I can't get the STLink drivers installed on Windows 10 / 11 aarch64 Parallels VM running on Mac M1.Is there any support for ARM64 Windows STLink drivers?
hi:I’m using the STM32N6570-DK board to develop a USB-host application that connects to a UVC webcam.I started from the example inSTM32Cube_FW_N6_V1.2.0/Projects/STM32N6570-DK/Applications/USBX/Ux_Host_VIDEO.At run-time the start-up fails here:status = ux_host_class_video_start(video); // returns 0x54Looking at ux_api.h, 0x54 equals#define UX_FUNCTION_NOT_SUPPORTED 0x54I’m now stuck. Could you give me some pointers on how to debug and solve this?Thanks a lot!Board: STM32N6570-DKWeb-cam info (Windows):PS D:\workspace\temp> ffmpeg -hide_banner -list_options true -f dshow -i video="WEB CAMER"[dshow @ 00000189a52882c0] DirectShow video device options (from video devices)[dshow @ 00000189a52882c0] Pin "捕获" (alternative pin name "0")[dshow @ 00000189a52882c0] vcodec=mjpeg min s=1280x720 fps=30 max s=1280x720 fps=30[dshow @ 00000189a52882c0] vcodec=mjpeg min s=1280x720 fps=30 max s=1280x720 fps=30 (pc, bt470bg/bt709/unknown, center)[dshow @ 00000189a52882c0] vcodec=mjpeg min s=640x480 fps=
I am successfully receiving feedback from the motor side, including the encoder values, which are being read accurately.I am writing to update you on the motor control project and to seek your guidance on an issue I'm currently facing.Project Configuration:Microcontroller: STM32H723ZGMotor Drivers: Rhino RMCS-2303 (Quantity: 2)Motors: Rhino DC Motors (Quantity: 2)Hardware Setup:Motor 1 (Left Motor):UART Communication: USART2 (PA2-TX, PA3-RX)Control Pins: ENA (PC0), DIR (PC2), BRK (PC4)Feedback: ADC (PA0) - OptionalSlave ID: 7Motor 2 (Right Motor):UART Communication: USART1 (PA9-TX, PA10-RX)Control Pins: ENA (PC1), DIR (PC3), BRK (PC5)Feedback: ADC (PA1) - OptionalSlave ID: 6Current Status:I have successfully implemented the basic motor control system with the following functionalities::white_heavy_check_mark: Forward movement (F command):white_heavy_check_mark: Backward movement (B command):white_heavy_check_mark: Left turn (L command):white_heavy_check_mark: Right turn (R command):whi
Dear ST team , My STM32H753ZIT6 MCU is designed for working at 3.3V, Is this voltage compatible with the ST Link programmer? I want to know whether I need to put any level translator in between for SWDIO, SWCLK, SWO, VCP_RX, VCP_TX, NRST signals and the programming connector if 3.3V is not compatible.RegardsShyam
Hi guys, Recently I have started to do some practical test with STM8S105. While trying to implement PWM of TIM1 CH1 and CH2 with their complementary channels, it is seen that PWM pulses are generated only on main channels. Complementary channels are silent. Please see the code and suggest the way out. #include "stm8s.h" void setup_clock(void) { CLK->ICKR |= CLK_ICKR_HSIEN; // Enable HSI while (!(CLK->ICKR & CLK_ICKR_HSIRDY)); CLK->CKDIVR = 0x00; CLK->SWR = 0xE1; } void setup_gpio(void) { GPIOC->DDR |= (GPIO_PIN_1 | GPIO_PIN_2); GPIOC->CR1 |= (GPIO_PIN_1 | GPIO_PIN_2); GPIOC->CR2 |= (GPIO_PIN_1 | GPIO_PIN_2); GPIOB->DDR |= (GPIO_PIN_0 | GPIO_PIN_1); GPIOB->CR1 |= (GPIO_PIN_0 | GPIO_PIN_1); GPIOB->CR2 |= (GPIO_PIN_0 | GPIO_PIN_1); } void setup_tim1_complementary_pwm(void) { TIM1->CR1 &= ~TIM1_CR1_CEN; CLK_PeripheralClockConfig(CLK_PERIPHERAL_TIMER1, ENABLE); TIM1->PSCRH = 0x00; TIM1->PSCRL = 0x00;
Hello,I would like to confirm how VBUS behaves in STM32 USB OTG depending on the Host/Device mode.Specifically, I would like to ask the following:When STM32 is configured as Host mode, should the STM32 source 5 V onto VBUS?When STM32 is configured as Device mode, does it only sense/monitor VBUS as an input?Is this behavior handled automatically by the internal OTG controller, or does it require an external VBUS power switch or additional external circuitry?Additionally, I would like to ask about a hardware configuration where an external 5 V supply is always present on VBUS, regardless of the STM32 Host/Device configuration.In this case, I would like to confirm:Whether this could cause any issues when STM32 operates in Host modeWhether it could affect Host/Device role detection or OTG behaviorWhether USB enumeration and normal data communication would still function correctlyIn other words, I would like to know whether a design where VBUS is always supplied by an external 5 V source is
I’ve been trying to download STM32CubeIDE from your website for the past 3 days without any luck. I’m located in Norway. I recently updated my old installation (version 1.4.x, not sure exactly which), and something went wrong during the update. Now the IDE is broken and won’t start, and I don’t have the original installer anymore. The problem is that the download from the website simply never starts. After I accept the license and press download, nothing happens. I’ve tried: Different browsers Clearing cookies/cache Incognito mode Using a VPN Different networks Still no success. Is there an alternative way to get the installer, or could this be some kind of regional/server issue? Any help would be appreciated.
Issue Description:I am using the `STM32_Programmer_CLI` to flash the BLE Wireless Stack on an STM32WB series MCU. However, after the programming process is complete, the memory read returns an unexpected value at the Stack Version address, even though the GUI shows the correct version.**Steps to Reproduce:**1. **Read Initial "Stack Version":**```textReading 32-bit memory contentSize : 4 BytesAddress : 0x200100140x20010014 : 01180003```*(Note: 01180003 corresponds to Version 1.24.0.3)*2. **Delete "Stack FW"**3. **Read "Stack Version" again:**```textReading 32-bit memory contentSize : 4 BytesAddress : 0x200100140x20010014 : 00000000```4. **Flash "stm32wb5x_BLE_Stack_light_fw.bin"**5. **Read "Stack Version" after programming:**```textReading 32-bit memory contentSize : 4 BytesAddress : 0x200100140x20010014 : 130E0019```**The expected value is `01180003`.****Comparison with STM32CubeProgrammer GUI:**If I then switch to the GUI version of STM32CubeProgrammer:* **Connect** --> **Firmware
Hello,I the Reference Manual (RM0410 Rev 5) for STM32F769I-DISCO, DMA_P1 is not shown connected to AHB Bus Matrix. It is intentional or error in the diagram ?Thanks,Debasish Das
Hello ST Community Team,We are currently working on an STM32N6-based design using TouchGFX and would appreciate your guidance regarding the LTDC framebuffer address configuration.Setup details:Display resolution: 800 × 600Graphics framework: TouchGFXExternal memory device: eMMC – IS21ES08GA-JQLIThe eMMC is used as external memory in the systemWhile configuring TouchGFX and LTDC, we need to specify the framebuffer start address for the LTDC layer. Since the framebuffer is not located in internal SRAM, we would like to understand:What LTDC framebuffer address should be provided when using an external eMMC (IS21ES08GA-JQLI)?Is it recommended (or required) to first map the framebuffer into an external RAM (such as SDRAM/PSRAM) instead of directly using eMMC?Are there any reference examples or application notes showing TouchGFX with LTDC using external eMMC for framebuffers?Any clarification on the correct memory mapping and recommended architecture for this use case would be very helpful.T
Hi ST team,I am using X-CUBE-SBSFU V2.8.0, project: Device: STM32H753Base example: NUCLEO-H753ZI 2_ImagesI ported UART pins/port for my H753 EVAL board.ProblemBuild fails in SECoreBin with GNU14.3 toolchain:C:/.../2_Images_SECoreBin/Src/se_crypto_bootloader.c:222:(.text.SE_CRYPTO_Decrypt_Init+0x16): dangerous relocation: unsupported relocation However , Then i shifted to 13.3 tool chain , then everything works fine for me. Please confirm whether this is a known GCC 14.3 compatibility issue for SBSFU v2.8.0 key generation. If yes, could you share an official patch for prebuild.sh / key assembly generation so generated key symbols are fully compatible with newer GNU/binutils?
Hello ST Community,I am reporting a 100% reproducible build failure when using the latest STM32CubeWBA SDK and tools for the NUCLEO-WBA55CG. It appears the default configuration generated by STM32CubeMX for the BLE_p2pServerThreadX application results in a RAM overflow and linker warnings.Environment:MCU: STM32WBA55CGUxBoard: NUCLEO-WBA55CGSDK: STM32Cube_FW_WBA_V1.9.0STM32CubeMX: v6.17.0STM32CubeIDE: v2.1.0 (with GNU Tools for STM32 14.3.rel1)Steps to Reproduce:Open the example .ioc file located at: STM32CubeWBA\Projects\NUCLEO-WBA55CG\Applications\BLE\BLE_p2pServerThreadX\BLE_p2pServerThreadX.iocIn STM32CubeMX, generate the project for STM32CubeIDE.Open the project in STM32CubeIDE v2.1.0 and perform a Clean Build.Observed Error (Scenario A - Default settings):The linker fails with a RAM overflow of 17,288 bytes:ld.exe: BLE_p2pServerThreadX.elf section `.bss' will not fit in region `RAM'ld.exe: region `RAM' overflowed by 17288 bytes Observation (Scenario B - Manually adjusting RAM
Hi ST-Team,context:- STM32H753ZI NUCLEO Board- VSCode with STM32CubeIDE Extension- Clang Compilerafter follow updatesSTM32CubeIDE VSCode from v3.7.0 to v3.8.0STM32CubeMx from v6.16.1 to v6.17.0incl. MCU Package H7 from v1.12.1 to v1.13.0incl. Azure RTOS for H7 from v3.4.0 to v3.5.0we get now following warning if a file is including the header\Drivers\CMSIS\Device\ST\STM32H7xx\Include\system_stm32h7xx.h[build] [6/206] Building C object CMakeFiles/STM32_NUCLEO-H753ZI.dir/AZURE_RTOS/App/app_azure_rtos.c.obj [build] In file included from D:/dev/Prj/Clean_STM32H7_Project__02/AZURE_RTOS/App/app_azure_rtos.c:28: [build] In file included from D:/dev/Prj/Clean_STM32H7_Project__02/cmake/stm32cubemx/../../Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h:124: [build] In file included from D:/dev/Prj/Clean_STM32H7_Project__02/cmake/stm32cubemx/../../Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h753xx.h:232: [build] D:/dev/Prj/Clean_STM32H7_Project__02/cmake/stm32cubemx/../../Drivers/CMSIS/De
I have been attempting to get a GPS lock with the TESEO-LIV3F, and I am not able to. I am fairly certain that it has to do with how I designed the signal chain from the chip antenna to the RF-IN pin on the LIV3. I have ensured that it was outside with a clear view of the sky, I have sent the $PSTMCOLD, 6 command to it. I have tried to initiate with this command; $PSTMINITGPS,3912.826,N,11939.993,W,1487,17,02,2026,21,11,30, but then later sent $PSTMRESTOREPAR to reset it. I do not have teseo-studio seeing as I am on linux. Any help will be appreciated.
Dear STMicroelectronics Community, I am an electronics engineer seeking for technical help. My problem is that I want to reverse engineer an old STi7101 CPU based Set Top Box with HDMI output or say it less complicated, a Dish Antenna Receiver Box. My problem is that I need an Board Support Package for STi7101 board. I already had look for the datasheet of STi7101, and there is written that the CPU supports Windows CE. My plan is to run Windows CE on the box. Is there a way to make it work? Thank you.
stm32cubeIDE for Vscode ,there is no one-click download function. How to add?
Hey I am having trouble tryng to connect my stm32g473 to a canbus. I am using a l9616 as a transceiver and the bus is functions as I have connected to it with an stm32f722re with the same l9616.The clock is 64Mhz,Ive used the canbit time calculation website to define the values of nominal time 1 and 2 to achive 500kbs.Also using NVIC and it seems to be configured fine. When tested in loopback the interrupt is called and the messages are received.This is the init with the filter config,as I ve understand I am not filtering anything and any of the messages on the bus should get to my uC.When running the state of hfdcan1 is Busy and also no error code show up.FDCAN_HandleTypeDef hfdcan1; /* FDCAN1 init function */ void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE END FDCAN1_Init 0 */ /* USER CODE BEGIN FDCAN1_Init 1 */ /* USER CODE END FDCAN1_Init 1 */ hfdcan1.Instance = FDCAN1; hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1; hfdcan1.Init.FrameFormat =
I would like to use Zephyr as the RTOS for my project using an STM32WB55 and OpenThread. Attempting to build the simple example 'shell' application fails for the nucleo_wb55rg board. west build -b nucleo_wb55rg c:\Projects_local\stm32_openThread\shell_openThread -p --build-dir c:\Projects_local\stm32_openThread\shell_openThread\build\nucleo_wb55rg -- -DBOARD_ROOT='c:\Projects_local\stm32_openThread\external\zephyr' -DCONFIG_NO_OPTIMIZATIONS=y The error returned is:-- west build: making build dir c:\Projects_local\stm32_openThread\shell_openThread\build\nucleo_wb55rg pristine -- west build: generating a build system Loading Zephyr default modules (Zephyr base). -- Application: C:/Projects_local/stm32_openThread/shell_openThread -- CMake version: 4.1.2 -- Found Python3: c:/Projects_local/stm32_openThread/.venv/Scripts/python.exe (found suitable version "3.12.4", minimum required is "3.10") found components: Interpreter -- Cache files will be written to: C:/Projects_local/stm32
Require IBIS model for ECMF2-40A100N6 CMC. Please provide if available.
ST Community highlights – April to June 2026
Already have an account? Login
No account yet? Create an account
Enter your E-mail address. We'll send you an e-mail with instructions to reset your password.