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  Hey everyone, I'm having a weird issue with my STM32F4DISCOVERY board (MB997). It was working fine before, but now I can't program it anymore. Board info:   Board: STM32F4DISCOVERY Device: STM32F407VGT6 ST-LINK FW: V2J46M33 ST-LINK SN: 0671FF37324D423143244649   Symptoms:   STM32CubeProgrammer connects OK (Device ID 0x413 confirmed) Flash erase fails: Error: failed to erase memory sectors [0-2] RDP Option Byte shows 0xFF (corrupted) BOR_LEV = 3 (BOR OFF) Writing RDP from 0xFF to 0xAA fails, always comes back as 0xFF VDD measured at 2.89V   What I've tried:   Under Reset mode ST-LINK Utility STM32cubeProgrammer Different USB cable ST-LINK firmware update Nothing works. RDP is stuck at 0xFF. Has anyone seen this before? Any suggestions? Thanks in advance!

Hello All,I am working on a custom project using STM32C011J6/SO8.I was trying to use PIN4 as ADC with 3 differents states but once I connect to GND, mcu resets. So now, I have no access to the mcu via Debugger because I set NRST_MODE in Option bytes to : 0x10 only internal RESET is possible.My questions:- Is there a way to recover it knowing that I tested and I can't access system memory.- I am using all the 6 pins (4 ADCs and 2 Outputs). Can I use the PIN4/PA0 as ouput without having reset issues?I know I can still block the reset by Option bytes but I am not sure if I would need a FW change in the future.Thanks,Ayoub

I upgrade my project recently to the above firmware (STM32Cube FW_WL V1.5.0)  which ended up not working.Lots of errors, I think mostly because of the introduction of the relay node.After a couple of days trying to get this working I started a fresh project from CubeMX and this did not compile into the STM32WLE5CB. Any idea on what the issue could be?

Hello,STM32CubeMX installer on linux doesn't creating desktop entry file.Thanks in advance.

Hi everyone,I'm currently working on a project involving a stepper motor controlled by an STM32 microcontroller, and I wanted to share a quick overview of how I set it up using STM32CubeMX.Hardware:STM32F103C8T6 (Blue Pill)Stepper Motor (28BYJ-48)Stepper Motor Driver (ULN2003 or A4988)Steps I Followed:STM32CubeMX Configuration:Created a new project for my STM32 board.Enabled GPIO outputs for the control pins connected to the driver.Set up a Timer for delays or PWM (if using A4988).Generated code with HAL libraries.Coding in STM32CubeIDE:Wrote a simple function to send step pulses and direction signals.For A4988, I toggled the STEP pin with a delay and used the DIR pin to control direction.For ULN2003, I used a stepping sequence on 4 GPIO pins.Testing:Got the motor running with basic forward and reverse motion.Planning to implement acceleration profiles and microstepping next.Let me know if anyone needs sample code or has tips on improving the motion control. Also, is anyone using FreeR

Hello,I am working on an STM32F7 project where I need to sample multiple ADC peripherals using DMA triggered by a timer. Problem: No ADC data is being written to ADC_BUF or ADC3_BUF even though main loop runs (buffers ADC_BUF and ADC3_BUF remains zero while counter increases) Current Setup:ADC1: 1 Channel, DMA2 Stream 0, triggered by TIM2 TRGO UPDATE ADC3: 2 Channels, DMA2 Stream 1, triggered by TIM2 CC2 DMA: Circular mode, DMAContinuousRequests enabled TIM2: 10 Hz update event Mode: ContinuousConvMode is Disabled, ScanConvMode is Enabled What do I need to change to fix this? /* USER CODE BEGIN PV */ volatile uint16_t ADC_BUF[ADC_BUF_LEN]; volatile uint16_t ADC3_BUF[ADC_BUF_LEN]; uint16_t counter = 0; /* USER CODE BEGIN PV */ /* USER CODE BEGIN 2 */ HAL_CAN_Start(&hcan1); HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC_BUF, ADC_BUF_LEN); HAL_ADC_Start_DMA(&hadc3, (uint32_t*)ADC3_BUF, ADC_BUF_LEN); HAL_TIM_Base_Start(&htim2); /* USER CODE END 2 */ /* USER CODE BEGIN

Dear Team,I have a board contain STM32WBA5MMG and  AD5941. We have provided a single RESET for both the chips.The circuit is given below.May Iknow will this cause any issues. RegardsHiyo

When I followed the link https://wiki.st.com/stm32mcu/wiki/Connectivity:STM32_Sniffer_for_BLE_Setup_guide,I successfully make Neclueo-WB55 be sniffer device while STM32WB sniffer displayed in the wireshark startup page,meanswhile I really capture the BLE advertise packets like this screenshot 1, But come problems,it only capture advertise packet as title said,connection packet like GAP parameters update or CONN_REQ all cannot be captured,how I should do to solve this problem like screenshot 2,

Hi everyone,I am designing a custom Power Distribution Board (PDB) handling up to 200A at 24V. This PDB will eventually interface with an STM32 and a Jetson Orin Nano for telemetry and control, but my current focus is solely on verifying the robustness of the analog/power switching layer.I would love to get your thoughts on the pre-charge (soft-start) and emergency shutdown logic I’ve implemented, as well as the layout approach. Here is the operational breakdown of the circuit:Turn-On & Soft-Start Sequence: When the main switch is closed, Q1 directly pulls K1's coil to GND, turning it on. The pre-charge resistor (R3) starts charging the bulk capacitors (C1, C2). Simultaneously, the RC timer network (C3 + R5 / 220k) starts charging. After about 1-2 seconds, it triggers Q2, which then pulls the main contactor K2's coil to GND. K2 closes, taking over the 200A main load and dropping the current through the R3 pre-charge resistor to near zero. Note: I can always swap R5 to 330k or 470k

Hi.I'm working with the FSM in LSM6DSO. I'm able to program detection which I want, but I struggle to do something like "fail-safe" to avoid the algorithm to stuck in the middle of the detection.For example, I want to do a "throw" detection of a thing. The accelerometer is in the thing.I can simply wait for enough acceleration in -X (in my case it will be always in this axis), then wait for the "fly" of the thing, where simply I can use norm V, which must be almost 0, as it's almost free fall, and it must fly for some time.But I struggle to do some timeout to jump out of the fly detection, when there is no any, after e.g. 1s.The problem is, that I can't use 2 timers (there is only single TC), because from manual, every time when comparison is done, the TC is loaded automatically and even when setting SCTC1, it loads anyway when I do comparison of 2 different timers.Here is the example in the MEMS studio: Now the FSM is able to stuck at S4, where it will wait for the "fly" det

Hello, Is it possible to use two OSPI with below configuration.  I can make this configuration in cubeMx but whiel debugging ospi1 is not working after ospi2 initialize.   

* https://www.st.com/en/evaluation-tools/steval-usbc2dp.html#overview For the USBC2DP board is the source code available for it.  I'm trying to do something similar with a N6 chip. Page for the software* https://www.st.com/en/embedded-software/stsw-usbc2dp.html

Goal boot from a Quad SPI flashI shouldn't need to change any OTP settings.  Any sNor flash chip connected to XSPIM_P2 that can operated in single spi mode can be booted off from? From my understanding if we want to make a dev board and use a different external memory that is not Octo SPI flash but just Quad SPI flash we shouldn't have to change any of the OTP registers.  SinceIn sNor flash it starts in single spi modeThen in your FSB you can configure the SPI to your given device(From my understanding)There are no OTP registers for Nor flash settingsThese are all setup in the ROMChanging OTP 11 bits (5-8) would force us to loose the ability of Dev up (From my understanding) Most of this info is from theHow to proceed with boot ROM on STM32N6 MCUshttps://www.st.com/resource/en/user_manual/um3234-how-to-proceed-with-boot-rom-on-stm32n6-mcus-stmicroelectronics.pdf  No boot source is programmed in OTP default source is serial NOR No configurati

I have a STM32N6570-DK and i can't seem to program it any more.  I tried it in both the STM32 programmer gui and terminal application.  So i can connect to the device read and read the flash but i can't seem to write to it any more.  I can't even erase the flash.  I have another  Boot 0 = 0 (L)Boot 1 = 1 (H)     

i need build a slider as following picture, when i change the item up and down , at the same time, the slider need move up and down with the item's movement;    

Hello,I am working with the STM32H7B3I-EVAL boardI have I2C slave model work properly the default adress used by contoller given in schematich work on 84 aand 85 adress but the other peripheral adress not get give me the roadmap for the coding of communication protocolsI2C Slave Address detect. how can i code done for other peripherals using mfx expander give me solution  didnt solve the issue.Thank you 

Hi everyone,I’m working on a battery monitoring prototype using an STM32F303. I’m measuring multiple analog voltages using the internal ADC with DMA. The ADC readings fluctuate by ±20 counts whenever the PWM output for the buck converter is enabled.I already added averaging in firmware, but the noise is still visible. The analog input traces are routed near the switching MOSFET area on the PCB.My questions:Is this more likely caused by ADC sampling timing or switching noise coupling?Would increasing ADC sample time help in this case?On the PCB side, should I separate analog and power ground planes or just improve return current paths?

Dear STM expert:     Currently, Iam facing an issue:when using the stm32f030f6p6 chip, I cannot find this chip model when creating new projects in stm32cubeide and stm32cubeMX ,thus it making it impossible to new projects,what this?hope a reply..thanks.

New question split from this post. OK THANK  YOU @mƎALLEm , CAN U SHARE THE RMII CONFIGURATION FOR STM32H745BIT6?  

I've developed on an STM32U5A9J-DK using ThreadX, which, via USBX, creates a loopback audio interface between the PC and the device in the way: PC->speaker on device->microphone on device->PC.The devices are correctly seen and are working, as I'm able to enumerate them on the host and the device correctly receives audio frame,s and I'm able to process them into the device.Now, the issue is that I'm unable to send the audio packets back to the host.My implementation is pretty simple: I'm using the USBD_AUDIO_PlaybackStreamFrameDone function to read the audio frames and send them back to the microphone interface withVOID USBD_AUDIO_PlaybackStreamFrameDone(UX_DEVICE_CLASS_AUDIO_STREAM *audio_play_stream, ULONG length) { UCHAR *read_buffer; ULONG read_length; UCHAR *write_buffer; ULONG write_length; AUDIO_FRAME_MSG frame_msg; AUDIO_FRAME_BUFFER *frame_buf; /* -------------------------------------------------------------------------- */ /* STEP 1: Get A

Hi everyone,I have a screen project displaying a camera image using an STM32N6. I've validated and run several peripherals like DCMIPP and DMA2D. I'm currently displaying a 720x576 resolution image from DCMIPP on the screen via layer 2 using bitmap addressing.My question is: Since I'm using internal RAM, Touchgfx uses one layer, and one layer is used for the camera. Because I'm not processing any bitmaps and need space, I've significantly reduced the size of the cmd_list area. After adding all this, I have about 300kB of free RAM left.Now, what I need is to be able to see this camera image in full size on my 1024x600 px screen. However, I want to know if this enlargement is possible and if it requires a cmd_list, i.e., vector graphics.Will I use vector graphics for this? Will GPU2D use the RAM allocated for layer 2 for this operation, or will it require an additional amount of RAM equal to the screen size? Best Regards,Onur 

We are currently using LPTIM1 to measure the time period. As this operation needs to be performed frequently, we are using the following APIs:   HAL_LPTIM_TimeOut_Stop_IT(&hlptim1) HAL_LPTIM_TimeOut_Start_IT(&hlptim1, 0xXXXX, 0xXXXX)   During this process, the LPTIM_Disable() function temporarily disables all interrupts using PRIMASK while waiting for the LPTIM_FLAG_ARROK and LPTIM_FLAG_CMPOK flags.   This global interrupt masking is causing data loss on LPUART1, which is operating at 115200 baud. As a result, we are encountering ORE (Overrun Error) due to missed UART interrupts.   Given this behaviour, we would like your guidance on the following:   Is it safe to modify the LPTIM_Disable() implementation by removing or commenting out the PRIMASK-based global interrupt disable? Alternatively, is there a recommended approach to avoid this blocking behaviour while still ensuring correct LPTIM operation?   We are concerned about maintaining real-t

Hello,I'm trying to write to configuration register of P3T1750 sensor, I can perform this with I2C protocol but it not successfully with I3C, the sensor still ACK the write command but it NACK the read command to configuration register. With the temperature register i can read value with I3C.I just want to confirm that this is I3C/I2C sensor but the configureation register only r/w by I2C controller, right?

I am trying to build a custom Yocto Scarthgap image for a custom STM32MP153CAA3 board.I have followed the guide at https://wiki.st.com/stm32mpu/index.php/How_to_create_your_own_machine but have several issues.I have created a configuration in CubeMX 6.15.0 and exported the DTB into my project.When I try and build I get an error in u-boot ERROR (phandle_references): /soc/rcc@50000000: Reference to non-existent node or label "clk_hse"(along with references to other clock nodes)I do a `devtool  modify u-boot-stm32mp`  to get at the source code and follow through the DTB The includes from the u-boot DTB file from CubeMX are:#include "stm32mp153.dtsi" #include "stm32mp15xa.dtsi" #include "stm32mp15xxaa-pinctrl.dtsi" #include "stm32mp15-m4-srm.dtsi" #include "stm32mp15-scmi.dtsi"stm32mp153.dtsi includes stm32mp151.dtsi which references the clocks, which is great.However the last include, stm32mp15-scmi.dtsi then goes and deletes them all!/delete-node/ &clk_h

Hello,coming from OpenSTLinux 4.2 (mickledore) we are in the process of migrating to OpenSTLinux 6.2 (scarthgap).The process of how multiple partitions (bootfs, vendorfs, userfs) are "split out" of the rootfs appears to have changed considerably.After switching all relevant meta layers to the commit/version used in OpenSTLinux 6.2, we effectively get bitbake QA errors for every image recipe (even the ones not being built). The errors appear related to the new bbclass "stsplitpartitions".The release notes of OpenSTLinux 6.2 mention the change as "Add image class to split rootfs image on several partitions: ST SPLIT PARTITIONS", but fail to provide any guideline on how to migrate existing projects to the new partitioning scheme.For testing, I removed all our proprietary layers and only kept the ST layers and standard Bitbake/OpenEmbedded layers.But the errors persist even for this minimal setup when building the standard ST image recipe st-image-core.How does st-split-part