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Subject: STM32F373CCT6 SDADC: Wrong Readings with VDDA Reference on One Board After Environmental TestingHello ST Support Team,We use the STM32F373CCT6 to read four analog inputs with SDADC1 and SDADC2. One of our boards developed a problem during environmental testing (temperature change, dry heat, cold, damp heat cyclic and steady state), where it ran in full-function mode throughout.What happenedThe board worked correctly until day 2 of the damp heat steady-state test (40 °C). Then all four channels read with an offset (for example, a 100 V input read as 50 V). After a power cycle it worked for 2 to 3 hours, then read full scale (3.3 V) even with no input. Reflashing the firmware did not help.A couple of days later we debugged it with the same firmware (internal VDDA reference). With no input, each channel should read 1.65 V (confirmed with a multimeter at the MCU pin), but the firmware reads 1.85 V on all four channels. With the reference set to internal 1.8 V, the readings are cor

Board: STM32N6570-DK Sensor: Sony IMX219 (Raspberry Pi Camera Module 2 / NoIR), custom driver, connected via a 15-pin-to-22-pin adapter cable into the board's camera connector (normally used for the MB1854/IMX335 module)SummaryI've written a from-scratch IMX219 driver (I2C register map transcribed from the Linux kernel's imx219.c) as an additive sensor option alongside the working IMX335 path. I2C control, power sequencing, and CSI-2 D-PHY link all come up healthy. DCMIPP's own status registers report that PIPE1 is continuously and successfully capturing new frames. But the actual pixel data written to memory is frozen — bit-for-bit identical — and does not respond to real scene changes. I'm looking for insight into what could produce this specific disconnect.Configuration2 CSI-2 lanes, D-PHY bitrate bucket DCMIPP_CSI_PHY_BT_900 (900 Mbps bucket, closest available to the computed 912 Mbps for this PLL config) Sensor PLL: VTPXCK_DIV=5, PREPLLCK_VT_DIV=3, PLL_VT_MPY=57, OPSYCK_DIV=1, PRE

From what i've seen the Rust programming language is becoming more and more popular and since it does not rely on a virtual machine, like java or python, it could be a good option for embedded development and other low-level programs. I know that there are ways to get Rust on STM32 MCUs running, but without official support its really hard to start a series project using those tools. At this point i see it as something fun to try out and benchmark and compare with a traditional C program + FreeRTOS.Does anyone know if there are any official plans from ST to have a Rust wrapper on the existing C HAL or a complete ground-up Rust HAL? Maybe support in CubeIDE for both C and Rust?

Hello,I’have managed to define/train/quantize/translate_for_target a model so far. The target is the STM32N6.I have also managed to run the model on the target by an own script using airunner functions/methods.The last step remaining is to get rid of the airunner-magic so that i can integrate the created .c/.h (by stedgeai) into my own framework on the target. Observation 1:I first noticed that the memory location of the weights is neither az 0x7100_0000 nor at 0x7038_0000 as suggested by the output.From network_generate_report.txt:octoFlash  [0x70380000 - 0x71380000]:     60.095 kB /     16.000 MB  (  0.37 % used) -- weights:     60.095 kBFrom the generated C-File network_atonbuf.xSPI2.c (as a comment):/* index=8 file postfix=xSPI2 name=octoFlash offset=0x71000000 …. */LL_ATON_ALIGNED(64) const uint64_t _mem_pool_xSPI2_network[7693] = {It finally ended up at 0x701253c0. I have a hard time underrstanding which tool is relocating the buffers from where it is initially supposed to live.

Hi, STNow I followed the X-NUCLEO-53L7A1 User guide connection for the SATEL-VL53L7A TOF breakout boards LEFT and RIGHT Connection as Shown in the attached image and it worked well, even if there are 2.2K pull up resistors for each sensor which makes the equivalent pull up resistor = 2.2K / 3 but I worked well till I also added another 2 SATEL-VL53L7A TOF breakout boards in addition to 1 Barometer Sensor breakout board which has the part number STEVAL-MKI225A it started to make undefined behaviors such as (TOF sensors Initialization fault, Barometer Sensor Initialization fault, Barometer wrong readings).So, could this problem caused by another 2 SATEL-VL53L7A TOF breakout boards with there Pull-up resistors?and If yes, Should I remove the 0 Ohm resistors on solder bridges to disconnect the pull-up resistors from each sensor as shown in the second attached image?

*how to port an STM32N6570-DK STM32CubeIDE project to VS Code (CMake/Make): FSBL/ECBLOB layout, signing and flashing? Hi all,I'm moving an STM32N6570-DK application from STM32CubeIDE 2.2.0 to VS Code and would like to know the recommended approach for the N6. The project is based on the Model Zoo object detection "getting started" application. It adds a JPEG encoder, the H.264 video encoder (VENC), FatFs on SD, and audio.Is there an official or recommended way to convert an N6 CubeIDE project to CMake? Does the "STM32Cube for VS Code" extension handle the N6 application layout (FSBL plus signed application in external flash), or only simpler targets?

I can’t post a screenshot because I just get that error!Why is it telling me to check a link? It’s not  a link - it’s an image! I also can’t attach the images as attachments - it gives the exact same message.

Hello,I would like to report what looks like a bug in the STM32CubeMX MCU database for the whole STM32H5 family: the PLLx input frequency range (PLLxRGE) that CubeMX generates does not match the actual PLL reference frequency.A similar case was already reported for the STM32H5E4 and PLL3 in this thread (internal ticket #0064521). As far as I can see, the problem is wider: it affects every STM32H5 RCC database file, plus some PLL1 and PLL2 rules, and it is still present in STM32CubeMX 6.18.1.Disclosure: this was found by a Claude Opus AI agent while reviewing the code generated by STM32CubeMX for my project. I have checked the generated code and the database lines it points to, but I have not verified the behaviour on hardware (PLL lock/jitter), so please treat it as a report to be confirmed by your team.SetupMCU: STM32H563VIT6 (RCC IP STM32H5_rcc_v1_0) STM32CubeMX 6.17.0 (DB.6.0.170) and 6.18.1 (DB.6.0.181), with STM32Cube FW_H5 V1.6.0 and V1.7.0: same result HSE 25 MHz, USB clock from

After a few bytes have been transmitted, the TXTF flag becomes '1', even though CTSIZE has not yet returned to 0. For now, I’ve implemented a temporary fix by setting the TXPIE flag to '1' each time TXTF becomes '1'. It is worth noting that the first transmission of 70,000 bytes runs normally, but from the second transmission onwards, this error occurs. I am following the instructions in sections 50.4.9, 50.4.10, 50.4.11, and 50.4.12. I am using an STM32H743IIT6 chip.Document page 2227 of STM32H742, STM32H743/753 and STM32H750 Value line advanced Arm®-based 32-bit MCUs - Reference manualTXTF: transmission transfer filled 0: upload of TxFIFO is on-going or not started 1: TxFIFO upload is finished TXTF is set by hardware as soon as all of the data packets in a transfer have been submitted for transmission by application software or DMA, that is when TSIZE number of data have been pushed into the TxFIFO. This bit is cleared by software write 1 to TXTFC bit at SPI_IFCR TXTF flag triggers a

Dear STM32 Team,In large-scale embedded projects that span multiple hardware platforms and coexist with multiple application firmware instances, the current STM32CubeMX workflow creates a full independent copy of HAL/LL libraries for every single project workspace. This redundant duplication makes it extremely difficult to maintain a unified, shared library baseline across the entire codebase.At present, I have to manually copy the auto-generated src/ and inc/ files from CubeMX output into our standardized fixed project directory structure. This manual workaround completely breaks the native iterative maintenance flow: every subsequent re-generation of code via CubeMX requires tedious manual file migration, which introduces high risk of configuration mismatch and human error.It would be a highly valuable feature if STM32CubeMX could add a dedicated configuration panel to let users fully define the custom directory hierarchy for all generated source files, header files, and library comp

What could be the possible reason for the unresponsive feedback button on the production line? The defect rate is about 2% (total of 2000PCS).The circuit diagram is as follows.We conducted a plug-in replacement experiment, and the phenomenon followed the STM32F071CBT6TR.We plan to conduct IV curve experiments on pins 39, 40, and 41 to determine if there are any issues with these pins. Additionally, we suspect that there may be a problem with pin 6. Have you encountered similar phenomena before? Where is the problem usually?

Dear STMicroelectronics Technical Support Team,We are developing a hardware design using the STM32U585RIT3Q microcontroller and would like to request a schematic review.We request your technical assistance in reviewing the following areas:MCU power supply, decoupling capacitors, and grounding. VDDA, VSSA, VBAT, and internal SMPS connections. ADC input circuitry and input protection. SPI interface connections to the TXE8124 GPIO expander and external Flash memory. UART, SWD programming/debugging, reset, and boot configuration. GPIO assignments and alternate-function configurations.I would like to identify a suitable 16 MHz SiTime oscillator for the STM32U585RIT3Q as an alternative to the conventional crystal, NX2016SA-16MHZ-EXS00A-CS07826, due to potential reliability risks under high mechanical stress.The selected SiT1602BI-23-33E-16.000000E SiTime device should match the conventional crystal’s key electrical specifications and be compatible with the STM32U585RIT3Q. Please provide a su

Product / board: STM32MP257F-EV1, MB1936 revision, configuration [A35-TD or M33-TD]SummaryThe board worked for one session after two hardware changes, then stopped booting. LD6, LD5 and LD11 light. LD3 and LD4 do not. The Boot ROM gives no response over UART or USB.What was changedA PDM microphone was wired to PA6/PA7 by a wire tap at R169/R175 (MDF1). This was our own design decision, not based on any ST recommendation. A MAX98357A speaker amplifier was added on SAI2A (PJ11, PJ3, PJ12 at AF4), with matching device-tree changes.What I have checkedCheck Result NRST (B1) 3.3 V idle, 0 V pressed, 3.3 V after release VDDIO 3.3 V 1V8 1.8 V VDDCPU 0.8 V VDDCORE 0.8 V VDDGPU 0 V (not treated as a fault) VDD_DDR 0.037 V (not treated as a fault) VDDA1V8_AON 1.8 V  VDD3V3USB 3.3 V  HSE Not checked; no accessible probe point Boot ROM tests (SW1 all OPEN)STM32_Programmer_CLI -l detects the ST-LINK V3. -c port=/dev/ttyACM0 br=115200 and -c port=/dev/ttyACM1 br=11520

Hello, I'm developing software for the STM32WBA2. Bonding is a required feature of this project, so I've set the bonding-related parameters as follows: CFG_BONDING_MODE: Bonding mode (0x01)CFG_ENCRYPTION_KEY_SIZE_MAX: 16CFG_ENCRYPTION_KEY_SIZE_MIN: 8CFG_IO_CAPABILITY: Display Yes No (0x01)CFG_MITM_PROTECTION: MITM protection required (0x01)CFG_SC_SUPPORT: Secure Connections Pairing supported but optional (0x01)CFG_KEYPRESS_NOTIFICATION_SUPPORT: Keypress notification not supported (0x00) I've also attached app_conf.h and ble_conf.h.However, when I connect using ST BLE Toolbox and press the Bond button, the Bluetooth connection is lost.What could be the cause?Is it possible to view communication logs using ST BLE Toolbox? Best regards, Gotoda 

Setup- Board: STM32N6570-DK, Neural-ART NPU, dev boot.- Tool: ST Edge AI Core 4.0.1 (target stm32n6), ll_aton 1.1.3.275 / NetworkRuntime1201_CM55_GCC.a.- Model: ViT-style autoencoder encoder. Input 1×3×256×256 RGB, output INT8 [128,12] → 128 LE-uint16 tokens (256 B). Weights in xSPI2 NOR @ 0x70380000.Problem 1 — wrong latent (NPU)The board latent doesn't match ONNX Runtime on the compiled graph (0/128 tokens). Epoch tracing shows input, weights and the first conv are correct, but the first Concat output is placed by the planner on top of one of its inputs:input1  [1,256,512] @0x34310000output  [1,257,512] @0x34310000   (starts where input1 starts)LL_ATON_LIB_Concat copies inputs in order with forward memcpy, so it corrupts the tensor (every row becomes the class token). I added an overlap-safe copy as a local patch; that fixes the Concat, but a second fault remains in epochs 8..72 (first LayerNorm / start of the first attention block) → latent still wrong.Problem 2 — speedOne encode is

I’m using STEVAL-WBC2TX70 and needs STSW-WBC2STUDIO.However, the software is not available online.Can anyone send me the software ?

Hi,I am designing a self-powered USB Type-C application using the TCPP03-M20 with an STM32 UCPD controller. The product supports dual-role data (DRD) and can operate as either a host or a device: Host mode: Acts as a power provider (using the provider path with external N-MOSFETs driven by GDPg/GDPs). Device mode: Self-powered; only requires a USB data connection and does not sink power from V_{BUS}. Because the consumer power path is not needed, we are omitting the external consumer back-to-back MOSFETs.Could you please clarify: Pin termination: What is the recommended hardware connection for the unused GDCg (pin 7) and GDCs (pin 8) pins? Should they be left floating (NC), tied to GND, shorted together, or pulled down with resistors? Firmware / I2C handling: Beyond keeping the consumer gate driver open via the I2C register (GDC = 1), are there any internal bias, dead-battery handling, or fault/flag behaviors on FLGn we should account for when the sink path is omitted? Thank you!

Hi ST Team,In our design, the USB pin pairs from PA11, PA12 our failing short multiple times during hot plug in of type C port to power the board. The USB pin pairs does not directly go to type C port rather it goes through this chip PCMF3USB3S (ESD + EMI filter) from Nexperia. Currently we do not have any ESD protection on VBUS pin. The VBUS +5V currently generates 3.3VDD to power the STM32H56V3G on our board. There is also a diode as connected reverse b/w VBUS +5V and 3.3Vdd output as recommended in AN4899.Can you please give us some insights on why this could be happening and what would be the possible solution  

Good day Sir & Madam, Could you please confirm if MPN STW11NK100Z is free of Dechlorane Plus?We currently have stock with date code 2410 (Year 2024, Week 10). Can you please verify if this specific batch contains Dechlorane Plus?

Hi,We are developing a 380W/400W electronic ballast for a Mercury UV lamp (Dymax 36970), based on the circuit topology presented in ST AN2747 – 250W HID Metal Halide Electronic Ballast.Lamp specifications: P/N: 36970 (Brand: DYMAX) Rated power: 380W Lamp voltage: 135V ±15V Lamp current: 3.2A AC input: 230V We would appreciate technical guidance on the following questions: Topology: Is the AN2747 circuit suitable for scaling from 250W to 380–400W for a Mercury UV lamp? Power stage: Which components and design calculations need to be revised, particularly the PFC, MOSFETs/IGBTs, buck inductor, output capacitor, and gate drivers? Control: What changes are required for ignition, warm-up current limiting, and constant-power regulation? Regards.

Hi, I'm trying to get USART2 on my G070RB operational. When connected in loopback it doesnt recieve the sent message. When connected to computer Putty terminal doesnt recieve anything from board and vice versa. Both fuctions for rx and tx return HAL_OK.

Hi, good morning.I’ve an application based on STM32U5G9ZJT6Q; I’ve deployed a board, based on that chip, in order to control and manage user functions for an audio Hi-fi preamplifier.Among the interfaces which were configured, I’ve SPI1, connected to a volume control chip. NSS configured in software. Latch is coming from a GPIO (PA4).Well, regardless the configuration of this pin I’m adopting, I cannot have this latch signal pulling down to 0. it settles at 2.2 Volt (when the pin is ‘reset’), this is the minimum level, from the nominal 3.15 Volt. This does not make my audio chip work, as this 2.2 level still gets interpreted as ‘high’. I measured those levels directly at the output of PA4, no other components connected.Which is the root cause of this ? I mean, do you think it’s hardware failure on this GPIO only, or some conflict ?I managed to get it working by utilizing another GPIO, but I’m keen to know the reason why.For your information, here the other interfaces (all of them are w

When I clicked the "Access to MCU Selector" button, the interface did not respond. The pointer just kept rotating to indicate loading. However, when I clicked the "Access to Board Selector" button at this time, the selection interface could be opened.On the board selection interface, when I clicked the MCU/MPU Selector interface, it still showed the situation where the pointer was rotating and indicating a loading process, and I did not enter the MCU selection interface. 

I’m a rookie on STM32, this afternoon I experienced overcurrent on my board and expect to get some help to make sure my board can still function fully.My board is NUCLEO-G431RB. I connected my board with both STLink and 4 AA batteries, with JP5 jumper cap on 5V_STLK. Then the LD4 (overcurrent) started to blink and the MCU became extremely hot. After that, I tried to connect the board only with 4 AA batteries (JP5 jumper cap on 5V_VIN), though the circuit (serval LEDs and resistors) powered by the board still worked and LD4 did not blinking, the MCU temperature was very high (approximately 80-90℃). Appreciate anyone who can guide me on checking my board’s condition!I’ve tested the resistance between serval pins when the board was not powered:3v3-gnd, gnd-3v3: gradually increase to 525Ω.5v-gnd, gnd-5v: 871Ω-857Ω.Vin-gnd: Over Limit.gnd-Vin: more than 16MΩ, decreasing gradually. Sometimes Over Limit.I’ve tested the resistance between serval pins when the boaerd was powered through ST-Link

I laid out a 2 layer board.  It works fine but fails radiated emissions by 3 dB.  Would a 4 layer board likely reduce this enough?