STM8L101xx SR1 Changing Problem

singleiron · ‎2012-06-18

Posted on June 18, 2012 at 17:23

Hi everyone,

I have serious problem about TIMx_SR1 register. This register is 0x07 at the normal time. I finished my code and i am using timer3 everything is ok. Sometimes my timer3 working wrong and i found problem.The problem is SR1 register changing automatically and new value is 0x06. So that update interrupt flag(UIF) is set to zero and after this time TIMER3 always working wrong and not changing this stuation unless upload hex code again to MCU.Can anybody help me? Thanks alot.

Datasheet says to me(RM0013 page:182/266):

UIF: Update Interrupt Flag

This bit is set by hardware on an update event. It is cleared by software.

0: No update occurred.

1: Update interrupt pending. This bit is set by hardware when the registers are updated:

� At overflow if UDIS=0 in the TIMx_CR1 register.

� When CNT is re-initialized by software using the UG bit in TIMx_EGR register, if URS=0 and

UDIS=0 in the TIMx_CR1 register.

''Mustafa Tekdemir''

#egr #register #sr1 #ug #flag

singleiron · ‎2012-06-21

Posted on June 21, 2012 at 09:26

And again solution found by myself.

TIM3->EGR=0x01 // in this register UG(update generation) flag set to 1 and solved my problem.

Have a nice day.

''Mustafa Tekdemir''