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TIM2 interrupt at 100 kHz frequency

Posted on August 14, 2015 at 08:39 Hello! I have a little question about STM8S interrupt controller. I'm using IAR and the following code isn't quite clear for me. INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13) { //Here ar...

wir2ozz by Associate
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STM8L151G4U6 EEPROM maxiam programming time

Posted on August 12, 2015 at 08:11Hello ST Experts, Can you please advise the maximum programming time of the STM8L151G4U6 MCU EEPROM. The datasheet only mention the typical programming time. The maximum programming time is related to watch dog sett...

sinclair by Associate
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List of STM8S opcodes

Posted on July 13, 2013 at 06:51I have looked but can't find a ''complete listing of the op-codes for this MCU.  I'm using the STM8S-Discovery to teach my grand-kids programming, starting at the very basic machine language, then to assembler and the...

when dose the the update event occurs for TIM1 of stm8?????

Posted on August 07, 2015 at 15:24      In center-aligned mode, for odd values of RCR,for example RCR=1,when dose the update event occurs on the overflow and when occurs on the underflow for TIM1 of stm8????????????      Thank you very much!!!!!!!

STM8SF103 and keeping seconds

Posted on August 05, 2015 at 02:59Hi,I've been digging and researching how to keep the number of seconds in the system (i.e. system clock). On the STM32 it's quite easy as the clock counts into the 32bit (4x8) registers and you can load this with UT...

mitch by Associate
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What's your favorite C-Compiler? Why?

Posted on August 03, 2015 at 00:44What's your favorite C-Compiler for the STM8? What makes you prefer it over the others? What do you consider particularly important in a compiler? Philipp

A better workaround for the STM8 division bug

Posted on August 02, 2015 at 18:11The STM8 has a bug inits division implementation relating to the use of the undocumented bit 6 of the condition code register (see ''Unexpected DIV/DIVW instruction result in ISR'' in various STM8 errata notes). ST ...

Error in section 5.4.4 of the STM8 CPU programming manual

Posted on August 02, 2015 at 11:04The text claims that incw y writes x and thus Figure 12 shows a pipline stall at the following ld a, (x). But incw y does not write x, and in fact Figure 12 does not show a pipline stall. I suggest to fix this secti...