Once the PCB is released, there is a way to check that the hardware connection between the DRAM memory and the STM32MPU-DDR interface is functional. There is a DDR test suite that helps to validate the connection is functional.
Notice that ST helps the PCB designers, by providing different application notes about the layout recommendation and layout examples, see more at STM32MPx resource for PCB design signal integrity
1. DDR test suite for the PCB validation
In the majority of the designs, the DDR tests suite pass as soon as the designer carefully respects the ST application note about layout constraints. The condition being that there is no error in the schematics nor in the layout.
Passing the DDR test suite is the main criteria to validate the design in the whole STM32MPU temperature range with DDR3, DDR3L, DDR4, or LPDDR4 memory types.
It is recommended at the bring-up phase to test your design with the DDR test suite.
In case of suspicious failures in application, a 'time margin' procedure check (only applying STM32MP1x family) is available at https://drive.google.com/file/d/1Dh6jFb2rsjWcGXMupsuK4UVD33Y6OnmP/view?usp=sharing
2. Manual DDR PHY Tuning is deprecated
Manual DDR PHY tuning over different boards is not necessary. DDR PHY tuning is automatic DDR build-in PHY tuning at boot time.
Since ecosystem 4.0 it is strongly recommended to use automatic DDR-PHY built-in tuning (by not using the "st,phy-cal" property in the TF-A device tree). This property is deprecated as the DDR-PHY built-in tuning is always enabled in the 4.X ecosystem release.
For more information, refer to the ST Wiki:
ST Wiki: DDRCTRL and DDRPHYC device tree configuration.
Note: Automatic DDR PHY tuning is enabled when TF-A log shows up: “WARNING: Couldn't find property st,phy-cal in dtb”
3. Where to get the DDR test suite binary
DDR tests are available in the firmware. It must be compiled within STM32DDRFW-UTIL STM32CubeIDE project. The DDR test suite allows testing the memory with memory setting that is will be then used later on in TF-A.
The DDR tests binary is loaded via JTAG on STM32MPU in engineering boot mode. It can also be loaded with STM32CubeProgrammer CLI. Tests are controlled by writing commands on the Linux UART console. Alternatively test can be started from the STM32CubeMX DDR test suite GUI. DDR tests can be run in Windows or Linux operating systems.
4. Where to get the DDR test documentation
Under https://wiki.st.com/stm32mpu/wiki/Category:STM32DDRFW-UTIL
You can get the GitHub project and the README.txt for the instructions to run the test
The STM32CubeMX UM1718 §DDR Suite shows the device tree files generation to configure the STM32MPU DDR controller. It provides all the instructions to run the DDR tests. Accurate details about STM32MPUs DDR controller and about STM32CubeMX DRAM configuration parameters can be found in AN5168 for STM32MP1 family or AN5723 for the STM32MP2 family.
Additional resources for the bring up procedure: FAQ: STM32MP1 How to bring up STM32MP1
A new FAQ for STM32MP2 bring up is under preparation.
