Hello.
I have a custom board with a STM32U5F9 device, it has a 1-lane DSI connection to a 240x320 colour display with a JD9852 Controller. This works fine in LP mode;
- I can initialise the JD9852 controller and write to the GRAM using DSI commands in LP mode- this all works great.
- I can use Adaptive Command Mode to send my frame buffer to the display via the LTDC & DSI in LP mode.
But, when I enable HS mode for LongWrites, the data sent after a HAL_DSI_LongWrite call, observed on my scope, is not as expected for a DSI LongPacket format.
I can see the DSI bus going from LP to HS mode as expected, I can see the SoH byte pattern, but after that the bytes on the line are always wrong. (I'm counting data bits on each pos, neg DSI clock edge).
Example.
I send 8 bytes of FE'h via a LongWrite command so I expect to see 15 bytes on the DSI data line;
(SoT) (39 09 00 ECC) (2C FE FE FE FE FE FE FE FE) (CS CS) (EoT)
(Sot) (Header) (Payload) (Checksum) (EoT)
But I actually observe only 11 bytes on the DSI data line, the Header is missing, the Payload is short..
(SoT) 00 2C FE FE FE FE 58 00 00 FF FF (EoT)
uint8_t ramwr[8] = { 0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE };
HAL_DSI_LongWrite(&hdsi, 0, DSI_DCS_LONG_PKT_WRITE, sizeof(ramwr), 0x2C, ramwr);
Why would the DSI HOST not send the correct bytes on the data line?
My Lane Rate set by the DSI PLL is 120Mbps (15MHz byte clock).
I have noticed if I increase the Line Rate, more data bytes get send - is this a FIFO or timing error?
Any help gratefully received.
