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STM32MP133A, issue with booting from emmc with bus-width greater than 1

llogar1
Associate

I am working on a custom board with STM32MP133A cpu and Kingston EMMC08G-ML36 EMMC. The board boots fine from the EMMC, however if the board resets due to kernel panic and/or watchdog timeout it fails to boot from EMMC and enters DFU mode (where it hangs indefinitely). It looks like that after unexpected reset EMMC stays in 8-bit bus width and boot-rom fails to load the TF-A. The current workaround is to set bus-width to 1 in both u-boot and linux device trees. Is this boot-rom behavior described somewhere?

Is there any way to reliably reset bus-width from 8 to 1 in case of unexpected STM32MP133A reset? Or to get out of DFU mode after some timeout, although in this case bus-width still has to be reset to 1 somehow?

 

3 REPLIES 3
PatrickF
ST Employee

Hi,

if you are using STPMIC1, did the eMMC supplies get a power cycle in case of NRST pulse ?

Is it working when you press NRST button (if any) ?

Did you read STM32MP13 erratasheet if any related limitation ?

Normally, the BootROM issue a SW reset command to the eMMC which according to JEDEC should work in all eMMC states, but it might not work (well) on this particular eMMC device.

eMMC supplies power cycle in case of NRST pulse is the ultimate way to cleanly reset the eMMC. This could be done easily with STPMIC1 or with some glue in case of discrete supply (NRST might need to be extended to few ms, but there is register in STM32MP13 for that).

 

Alternatively, if eMMC supply is not cycling, you could try to connect NRST to the eMMC RSTn (but this pin should be programmed inside eMMC as it is disabled by default). But this should not be different that SW reset already issued by the BootROM.

Regards.

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llogar1
Associate

Hi Patrick,
Thank you for a quick answer. The custom device we are using does not have a STPMIC1. And unfortunately, no NRST button and as far as I know EMMC RSTn is not used.
Yes, I have glanced over errata sheet, but haven't found anything remotely similar.
So far, the solution is just to use bus-width=<1>. Not ideal, but at least it works reliably.
I've contacted the manufacturer of the device, and am waiting to hear from them...

You could also try to increase RCC_RDLSICR.MRD value to get larger reset time (I doubt it might help).

In case of HW modification worth to look to add a eMMC supply power-cycle in case of NRST.
Look to PWR_ONRST usage to control regulators in AN5586 


Maybe ask details to Kingston around EXT_CSD[177] (BOOT_BUS_CONDITIONS).
Note that during boot, BootROM issue first a CMD0 with Arg = 
CMD0 + 0xF0F0F0F0F0 (reset command), then set CMD low to ask eMMC to send boot sector on single data line (defaut as per JEDEC)

 

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.
Tip of the day: Try Sidekick STM32 AI agent, see here