2025-08-04 7:26 PM
I am just getting started with the stm32h723 ADC. If I create a regular sequence group of several input channels, how does my ISR know which channel was sampled last (which channel's data is in the DR)? I don't see this in the registers.
Thanks,
Mark
2025-08-04 7:53 PM
Typically you'd DMA a group of channels into an array, and then get an interrupt for some multiple of them.
2025-08-04 8:28 PM
So I have to go down another rabbit hole to get my ADC data? Is there a code example for the ADC-DMA transfer?