Hello,
We are currently working with STM32MP257F-EV1 evaluation board and attempting to enable I3C4 interface to communicate with LSM6DSV device. However, we are encountering the following error messages during boot:
[ 3.474187] stm32-i3c 46080000.i3c: (i3c-0) address not acknowledged
[ 3.478101] stm32-i3c 46080000.i3c: (i3c-0) address not acknowledged
[ 3.484119] stm32-i3c 46080000.i3c: (i3c-0) address not acknowledged
[ 3.490487] stm32-i3c 46080000.i3c: 1 target(s) assigned but 0 counted
[ 3.497837] stm32-i3c 46080000.i3c: Failed to register I3C master: -22
[ 3.503626] stm32-i3c: probe of 46080000.i3c failed with error -22
[ 23.205576] stm32mp_pm_domain power-domain-d1: sync_state() pending due toc
This is an excerpt from dts. The following has been added.
&i2c8 {
status = "disabled";
};
&i3c4 {
pinctrl-names = "default", "init", "sleep";
pinctrl-0 = <&i3c4_pins_a>;
pinctrl-1 = <&i3c4_init_pins_a>;
pinctrl-2 = <&i3c4_sleep_pins_a>;
status = "okay";
i3c-sda-rising-time-ns = <380>;
i3c-scl-hz = <300000>;
lsm6dsv@6A,2080070120B {
compatible = "st,lsm6dsv";
reg = <0x6A 0x208 0x70120B>;
assigned-address = <0xa>;
};
};
Issue Details:
When observing the waveform, we noticed that during Static Address phase following SETDASA command, a NACK is returned when SCL is high.
However, the sensor device does return an ACK when SCL is low.
Question:
Do you have any insights into this behavior where a NACK is returned when SCL is high?
We have created dts configuration based on the documentation at:
https://wiki.st.com/stm32mpu/wiki/I3C_overview
Kernel version: 6.6.78
Thank you very much for your support.
