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FreeBSD Port for mp157C

Stanislav Silnicki
Associate III

Hello! Is it feasible to start FBSD kernel?

So far I stuck with following error (seems to be from tf-a):

 

 

Loading kernel...
/boot/kernel/kernel text=0x1b4 text=0x5ad698 text=0x17e3d0 data=0xa4860 data=0x0+0x20c000 0x4+0x88d70+0x4+0xea43b|
Loading configured modules...
can't find '/etc/hostid'
can't find '/boot/entropy'
Using DTB compiled into kernel.
Kernel entry at 0xc0400200...
Kernel args: (null)
metadata: filename:/boot/kernel/kernel, size=11874740 loadaddr=0xc0400000
ERROR:   Illegal access to 0xffff0010:
ERROR:          FAIL_ID = 0x4c0
ERROR:          Non-Secure
ERROR:          Privilege
ERROR:          Read
PANIC at PC : 0x2ffc97b1

Exception mode=0x00000016 at: 0x2ffc97b1

 

 

 

I'm sure, that control passes to the kernel _start point. 

Any clues?

 

 

1 ACCEPTED SOLUTION

Accepted Solutions
Stanislav Silnicki
Associate III

it looks like default page builder code for PA->VA translation, implemented by the kernel conflicts with what mmu tolerates...

/usr/src/sys/arm/arm/locore-v6.S:

	/* 
	 * First map the entire 4GB address space as VA=PA.  It's mapped as
	 * normal (cached) memory because it's for things like accessing the
	 * parameters passed in from the bootloader, which might be at any
	 * physical address, different for every platform.
	 */
	mov	r1, #0
	mov	r2, #0
	mov	r3, #4096
	bl	build_pagetables

 

Given my board has 512Mb, this translation region must end at 0xc0000000 + 0x20000000 = 0xe000000...

so, mov r3, #3584 fixes this case and eventually kernel passes into translated address mode..

done.

View solution in original post

2 REPLIES 2
Stanislav Silnicki
Associate III

It looks like FreeBSD kernel is not allowed to enable MMU... why?

ASENTRY_NP(init_mmu)
....
	/* Enable MMU */
	mrc	CP15_SCTLR(r0)
	orr	r0, r0,	#CPU_CONTROL_MMU_ENABLE
	orr	r0, r0,	#CPU_CONTROL_V6_EXTPAGE
	orr	r0, r0,	#CPU_CONTROL_TR_ENABLE
	orr	r0, r0,	#CPU_CONTROL_AF_ENABLE
	mcr	CP15_SCTLR(r0)
	DSB
	ISB
	mcr	CP15_TLBIALL		/* Flush TLB */
	mcr	CP15_BPIALL		/* Flush Branch predictor */
	DSB
	ISB

	mov	pc, lr
END(init_mmu)

 

So, the line 9 (mcr CP15_SCTLR(r0)) makes tf-a completely unhappy...

Is some specific initialization required?

Stanislav Silnicki
Associate III

it looks like default page builder code for PA->VA translation, implemented by the kernel conflicts with what mmu tolerates...

/usr/src/sys/arm/arm/locore-v6.S:

	/* 
	 * First map the entire 4GB address space as VA=PA.  It's mapped as
	 * normal (cached) memory because it's for things like accessing the
	 * parameters passed in from the bootloader, which might be at any
	 * physical address, different for every platform.
	 */
	mov	r1, #0
	mov	r2, #0
	mov	r3, #4096
	bl	build_pagetables

 

Given my board has 512Mb, this translation region must end at 0xc0000000 + 0x20000000 = 0xe000000...

so, mov r3, #3584 fixes this case and eventually kernel passes into translated address mode..

done.