2023-03-21 07:59 AM
Hi,
I am experiencing a loss of about 2 seconds on the hwclock every time I reboot. Regardless of how long the system has been powered off, it is consistently the same amount of time lost.
I have come across the following posts which seem to point to the issue being in the initialization of the LSE oscillator during startup.
STM32 RTC loses one second after each reset
Stm32L452 RTC Clock Drift with use---related to entering/exiting shutdown mode?
My question is, since the RCC initialization is handled by the A7 core, where do I prevent the LSE from re-initializing on each boot? Below is a snippet from my device tree
//tfa device tree
clk_lse: clk-lse {
st,drive = < LSEDRV_MEDIUM_HIGH >;
/* USER CODE BEGIN clk_lse */
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
/* USER CODE END clk_lse */
};
Any suggestions would be appreciated.
2023-03-21 08:24 AM
Hi @DShri.1
May this post helps you :
https://community.st.com/s/question/0D53W00001OOwmmSAD/rtc-is-not-keeping-time-during-low-power-mode
Else could you share your OpenSTLinux version ?
Thanks
Olivier
2023-03-22 12:33 AM
Hi @Community member
I am using OpenSTLinux 3.1.11-openstlinux-5.10-dunfell-mp1-21-11-17 with a custom hardware.
I am not sure the solution proposed in the linked post will work for me. I have compared the system time and hwclock after bootup and they are identical. There is a slight drift between the two during run mode, but I have also confirmed that the hwclock is not being set to the system clock when powered off, as I had initially suspected.
The 2 seconds offset seems to be consistent not matter how long it is powered off for, and regardless of whether I issue a reboot /shutdown command, or if I physically remove power.
2023-03-22 12:50 AM
I assume that the LSE clock is being initialized either in tf-a or u-boot, since it should already be configured before the M4 core runs. (I am starting the M4 core from u-boot). I have also made sure that the SysclockConfig() is not being run by the M4 code.
Is it possible to prevent re-initialization of the LSE clock in the device tree ?