Problem with PLL while using STM32MP157A engineering mode

[Orez]

There is a problem about PLL3 while using engineering mode on STM32MP157A-DK1 board. By STM32CubeMX, I configed the clock of M4 core, using PLL3P to get 209MHz, generated code, rebuild it and entered the debug mode. But it shut down and get into an Error. I debuged it bt step, found that it failed in the intial function HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct). When it get to configure PLL3, failed and enter the error. So what I missed? May someone can help me. Thanks!

[Orez]

Even using my own custom board with ST-LINK/V2, it encountered the same problem. And not only the max 209MHz, other frequences is failed. But using other clk sources(like HSI, CSI, HSE) is good. Only PLL3 will failed.