This article is applicable for STM32H74x, STM32H75x, STM32H72x, or STM32H73x microcontrollers.
We often see developers facing issues with these microcontrollers when they need to use BDMA, or DMA to transfer data to/from the RAM, but no transfer is issued.
One of the most probable reasons is that the DMA can’t have access to the resource. Some masters have sets of slaves that the master can have access to, but not all slaves are accessible.
According to the table “Bus-master-to-bus-slave interconnect” in the reference manuals RM0433/RM0399/RM0468:
“X” means the master has access to the slave resource.
“-” means that the master doesn’t have access to it.
Figure 1. STM32H743 interconnect, screenshot from table 3 in RM0433 page 104
As shown in figure 1 above, BDMA can only perform transfers from/to the slaves located on the D3 domain. For example, all the slaves on AHB4, APB4, SRAM4, and Backup SRAM. All other slaves aren’t accessible.
DMA1 or DMA2 can’t access neither to ITCM nor to the DTCM memories.
MDMA doesn't have access to the peripherals on AHB2.
For example, if you have a buffer on SRAM1 which is located on the D2 domain and you need to perform a data transfer from/to that RAM using BDMA, the transfer will never occur. In that case, the solution is to relocate the data in SRAM4.
Related links
- Reference manual 0433: STM32H742, STM32H743/753 and STM32H750 Value line advanced Arm®-based 32-bit MCUs
- Reference manual 0399: STM32H745/755 and STM32H747/757 advanced Arm®-based 32-bit MCUs
- Reference manual 0468: STM32H723/733, STM32H725/735 and STM32H730 Value line advanced Arm®-based 32-bit MCUs
