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STM32H5: How to interconnect RCC clocks to timers

Christophe VRIGNAUD
ST Employee

Introduction

RCC clocks can be internally connected to timers.

The points addressed here are the following:

  • Finding which clock is connected to which timer.
  • Finding how the clock is connected to a timer.
  • Implementing this connection in STM32CubeMX.

This article focuses on the example of the LSE clock and is based on the example of the STM32H563.

1. Finding which clock is connected to which timer

The first step is to find the interconnect information in the reference manual (RM). In the case of the STM32H563, it is given in the shape of a peripherals interconnect matrix. Section 15 of the RM0481 describes this.

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2024-12-10 14_32_28Ter-STM32H523_33xx, STM32H562_63xx, and STM32H573xx Arm_Sup_®__Sup_-based 32-bit MCU.png

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2024-12-10 14_32_57-STM32H523_33xx, STM32H562_63xx, and STM32H573xx Arm_Sup_®__Sup_-based 32-bit MCU.png

 In this table, we can find the following connection information:

  • Only TIM2, TIM12, TIM15, TIM16, and TIM17 are concerned by RCC clocks connection.
  • In particular, the LSE can be connected to TIM2, TIM15, TIM16.

2. Finding how the clock is connected to a timer

The number in the table refers to the next subsection which gives more details about this peripheral connection. In this case, it is section 15.3.5.

2024-11-29 16_17_26bis-STM32H523_33xx, STM32H562_63xx, and STM32H573xx Arm_Sup_®__Sup_-based 32-bit MCU.png

TIM2

For TIM2, Table 420 shows that LSE is connected to an external trigger signal tim_etr3.

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In Section 39.4.5, subsection External clock source mode 2 gives more details and a diagram of the input block.

2024-12-10 14_10_49-STM32H523_33xx, STM32H562_63xx, and STM32H573xx Arm_Sup_®__Sup_-based 32-bit MCU.png

 

TIM15/16

For TIM15/16, Table 450  (Table 438 is a typo error RM0481 revision 2) shows that LSE is connected to an input signal of the timer tim_ti1_in4 of TIM15 or tim_ti_in2 of TIM16.

2024-12-10 14_18_12-STM32H523_33xx, STM32H562_63xx, and STM32H573xx Arm_Sup_®__Sup_-based 32-bit MCU.png


Section 42.4.6, subsection External clock source mode 1 provides more details and a diagram of the input block.

2024-12-10 15_54_26-STM32H523_33xx, STM32H562_63xx, and STM32H573xx Arm_Sup_®__Sup_-based 32-bit MCU.png

 

Note:

  • The external clock mode 2 is available on TIM2 but not on TIM15/16.
  • In external clock mode 2, the clock signal can be divided by 2, 4 or 8. This allows the input to receive a clock with a frequency higher than the tim_ker_ck if it is divided.
  • In external clock mode 1, the timer counter can be updated on both edges of the external clock signal. This is not possible when the external clock source mode 2 is used.

 

3. Implementing this connection in STM32CubeMX

TIM2

External clock mode 2 can be selected either as the trigger source of a slave mode or directly as a clock source.

When LSE is a trigger source, the slave mode can be any of the possible modes. The screenshot below shows the example of [External Clock Mode 1]. The trigger source is [ETR1 through Remap]

TIM2.png

 

When LSE is a clock source, the slave mode can be disabled or any mode except [External Clock Mode 1]. The clock source is [ETR2 through Remap].

TIM2_Clock.png

TIM15

The external clock mode 1 is selected on the channel 1 as [Input Capture direct mode from Remap].

TIM15.png

TIM16

The external clock mode 1 is selected on the channel 1 as [Input Capture direct mode from Remap]. 

TIM16.png

 

Related links

 

Version history
Last update:
‎2024-12-19 05:44 AM
Updated by: