Introduction
The break feature is embedded only in timer peripherals that include complementary outputs. Specifically, it is available in timers that have at least one channel with two complementary outputs. This makes it suitable for:
- Advanced timers like TIM1, TIM8, TIM20.
- Lite-configuration timer peripherals like TIM15, TIM16, and TIM17.
This feature is supported across various STM32 families. You can check table 2 "Timers and break input availability in STM32 devices" in AN4277.
1. What is the break feature?
The break feature acts on the output stage of timer channels configured in output mode. As soon as an active edge is detected on the break input, the outputs of timer channels configured in output mode are either turned off or forced to a predefined safe state. Its key functionalities include:
- Immediate response: Upon detecting an active edge on the break input, the timer channels outputs respond in real time.
- Asynchronous operation: The break unit operates independently of the clock signal, so it provides real-time protection even in the absence of a clock.
2. Purpose of the break unit
The primary purpose of the break feature is to implement safe shutdown functionality in electrical power systems during anomalies. It is widely used in:
- Motor control applications: Protects motors from overcurrent or overvoltage conditions.
- Lighting systems: Ensures safe operation in high-power lighting applications.
- Switched-mode power supplies (SMPS): Provides protection against faults in power conversion systems.
- Induction heating: Safeguards against overheating or electrical faults.
3. Triggering sources
The break input can be triggered by both internal and external sources:
- Internal sources: These include comparators, DAC outputs, clock failure detection, and other embedded peripherals.
- External sources: GPIO pins or external signals connected to the break input.
- Combined sources: Advanced timers can use a combination of internal and external signals to trigger the break event.
Advanced timers support two break inputs (BRK and BRK2), each with different priorities.
In motor control applications, BRK2 is typically used for overcurrent protection, while BRK is used for overvoltage protection.
4. Break unit implementation
4.1 Register level configuration
The break feature is enabled using the BRK (BKE) bit in the TIMx_BDTR register following this sequence:
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; /* TIM1 clock enable */
Prescaler = (uint16_t) (SystemCoreClock / 500000) - 1; /* Set the Timer
prescaler to get 500 kHz as counter clock */
TIM1->CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); /* Select the up counter mode*/
TIM1->CR1 |= TIM_COUNTERMODE_UP;
TIM1->CR1 &= ~TIM_CR1_CKD;
TIM1->CR1 |= TIM_CLOCKDIVISION_DIV1; /* Set the clock division to 1*/
TIM1->ARR = PERIOD; /* Set the Autoreload value */
TIM1->CCR1 = PULSE; /* Set the Capture Compare Register value */
TIM1->PSC = Prescaler; /* Set the Prescaler value */
TIM1->EGR = TIM_EGR_UG; /* Generate an update event to reload the Prescaler
and the repetition counter value immediatly */
TIM1->SMCR = RESET; /*Configure the Internal Clock source */
TIM1->BDTR = RESET; /* Clear the BDTR bits */
TIM1->BDTR |= DEAD_TIME; /* Set the Dead Time value to 0 */
TIM1->BDTR |= TIM_LOCKLEVEL_OFF; /* Disable the Lock Level*/
TIM1->BDTR |= TIM_OSSI_ENABLE; /* Enable the Output idle mode */
TIM1->BDTR |= TIM_OSSR_DISABLE; /* Disable the Output run mode */
TIM1->BDTR |= TIM_BREAK_ENABLE; /* Enable the Break input */
TIM1->BDTR |= TIM_BREAKPOLARITY_HIGH; /* Set the polarity to High */
TIM1->BDTR |= TIM_AUTOMATICOUTPUT_ENABLE; /* Enable the automatic output */
TIM1->CCMR1 &= ~TIM_CCMR1_OC1M; /* Select channel 1 output Compare and Mode*/
TIM1->CCMR1 &= ~TIM_CCMR1_CC1S;
TIM1->CCMR1 |= TIM_OCMODE_PWM1;
TIM1->CCER &= ~TIM_CCER_CC1P; /* Set the Output Compare Polarity to High */
TIM1->CCER |= TIM_OCPOLARITY_HIGH;
TIM1->CCER |= TIM_CCER_CC1E; /* Enable the Compare output channel 1 */
TIM1->CR1|=TIM_CR1_CEN; /* Enable the TIM peripheral */4.2 HAL drivers configuration
Macros:
- TIM_IT_BREAK: Enables the break interrupt.
- TIM_DIER_BIE: Configures the break interrupt in the stm32XXxx_hal_tim.h file.
Usage:
- These macros are used to configure the timer's interrupt enable register (DIER) to respond to break events.
- When a break condition occurs, the interrupt service routine (ISR) is triggered, allowing the application to handle the fault condition.
Callback function:
The HAL library provides a callback mechanism to handle break events. The callback function is defined as:
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);This function is called automatically when a break event occurs. So, you can implement custom fault-handling logic, such as logging the fault, shutting down peripherals, or resetting the system.
Break input flags:
- TIM_FLAG_BREAK TIM_SR_BIF: Break interrupt flag
- TIM_FLAG_BREAK2 TIM_SR_B2IF: Break 2 interrupt flag
- TIM_FLAG_SYSTEM_BREAK TIM_SR_SBIF: System break interrupt flag
These flags can be polled or cleared in the application code to manage break events. For example:
if (__HAL_TIM_GET_FLAG(&htim, TIM_FLAG_BREAK)) {
// Handle break event
__HAL_TIM_CLEAR_FLAG(&htim, TIM_FLAG_BREAK);
}4.3 STM32CubeMX configuration
For STM32CubeMX configuration, to enable the break input feature, click on "Activate break input" after choosing an advanced timer.
After enabling the break input, you can configure these three modes as shown below:
Related links
Application note 4776: General-purpose timer cookbook for STM32 microcontrollers
