Practical use cases to manage FIFO in USB OTG controllers in device mode on an STM32

FBL · ‎2025-09-23

Introduction

Following the knowledge article on configuring USB FIFO over USB OTG, this article focuses on practical FIFO memory allocation and configuration examples for different USB device applications on an STM32.

1. Memory allocation parameters

When configuring USB OTG FIFOs for different device applications, several parameters influence the FIFO size allocation and memory usage:

Parameter	Description
High/Full-Speed	USB operation speed mode (HS or FS)
Slave/buffer DMA	When buffer DMA is active, it requires additional FIFO space.
Bandwidth	Normal or High-bandwidth usage impacts FIFO size
Buffer	FIFO type (RxFIFO Control, RxFIFO BULK, TxFIFO#x, etc.)
#bytes if Active	Number of bytes allocated if the FIFO is active
Maximum packet size (MPS)	Configurable maximum packet size depending on application needs
Number of endpoints (EPs)	Number of endpoints using Tx FIFO
RxFIFO size	Should be at least the largest MPS that is received of all OUT EPs
Packet multiplier	Number of packets expected per transfer
Locations	FIFO memory locations used (in 32-bit words)
Availability	Total FIFO memory available
Usage	Percentage of FIFO memory used
AHB latency	Bus latency

2. USB OTG FIFO configuration cases

Case 1: Webcam

In the implementation

HAL_PCDEx_SetRxFiFo(&hpcd_USB1_OTG_HS, 0x100);
//Sets the Rx FIFO size to 256 words (1 word = 4 bytes → 1 KB). This buffer holds all OUT endpoint data and status information.
HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 0, 0x10);
//Sets Tx FIFO 0 size to 16 words (64 bytes) for Control IN endpoint (EP0).
HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 1, 0x200);
//Sets Tx FIFO 1 size to 512 words (2 KB) for another IN endpoint, typically isochronous

Case 2: Videoconference

Typically, in this implementation

HAL_PCDEx_SetRxFiFo(&hpcd_USB1_OTG_HS, 0x120);
//Sets the Rx FIFO size to 288 words.

HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 0, 0x10);
//Sets Tx FIFO 0 size to 16 words (64 bytes) for Control IN endpoint (EP0).

HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 1, 0x200);
//Sets Tx FIFO 1 size to 512 words (2 KB) for IN endpoint, typically isochronous

HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 2, 0x80);
//Sets Tx FIFO 1 size to 128 words (512B) for another IN endpoint, typically Bulk

Case 3: Mass storage

  /* Set Rx FIFO to accommodate 512 words*/
  HAL_PCDEx_SetRxFiFo(&hpcd_USB1_OTG_HS, 0x200);

  /* Set Tx FIFO 0 size to 16 words (64 bytes) for Control IN endpoint (EP0). */
  HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 0, 0x10);

  /* Set Tx FIFO 1 to 256 words (1KB) for Bulk IN endpoint */
  HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 1, 0x100);

Case 4: Audio OUT (headset +/speaker)

  /* Set Rx FIFO */
  HAL_PCDEx_SetRxFiFo(&hpcd_USB1_OTG_HS, 0x200);

  /* Set Tx FIFO 0 16 words (64 bytes) for Control IN endpoint (EP0) */
  HAL_PCDEx_SetTxFiFo(&hpcd_USB1_OTG_HS, 0, USBD_MAX_EP0_SIZE/4);

Conclusion

This article presented practical FIFO configuration examples for common USB device applications on STM32. Proper FIFO sizing is crucial for reliable USB performance and avoiding data loss.

For detailed reference, consult the STM32 reference manual and cube firmware packages for your MCU series.