Summary
This article provides a quick guide on what the STM32N6’s OTP bits are and how to program them. It includes step-by-step instructions and explanation on configuring the OTP124, responsible for changing the VDDIOs' voltage to 1.8 V instead of 3.3 V using STM32CubeProgrammer. This allows the STM32N6570-DK to achieve the nominal speed with the external memories.
Introduction
The STM32N6 series microcontrollers use one-time programmable (OTP) memory to set various configuration parameters, ranging from hardware configuration to security features. OTP bits are read or programmed by the BSEC (boot and security control). The full description of them can be found in reference manual 0486, tables 18 - 20, named “OTP fuse description”.
Among these OTP bits, it is possible to configure the STM32N6’s independent VDDIOx voltage level. Specific I/O voltage settings can be configured for: VDD, VDDIO2, VDDIO3, VDDIO4, and VDDIO5, allowing the use at 3.3 V or 1.8 V. The IO ranges are not continuous, and they should be set using the OTP to achieve their nominal speed when used in the 1.8 V range. This is the case for the STM32N6570-DK board, where the external memories are tied to 1.8 V, but the default OTP for the VDDIO2 and VDDIO3 is 3.3 V.
The article provides a step-by-step guide on how to program the OTP124 of the STM32N6 MCU on the STM32N6570-DK board. Specifically focusing on bits 15 and 16, which are responsible for VDDIO3 and VDDIO2, respectively. The programming is made using STM32CubeProgrammer. By following this guide, you gain a comprehensive understanding of the process and ensure the correct configuration of these critical settings.
1. Hardware and OTP fuse
The STM32N6570-DK uses external memories at 1.8 V voltage and relevant I/Os should be configured from the 3.3 V default using firmware or software and OTP to get nominal speed.
Be aware that setting HSLV_VDDIOx and VDDIOxVRSEL bits while VDDIOx is in the 3.3 V range damages the device.
The relevant power supply connection on the discovery kit hardware is shown below:
This means that:
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XSPIM_P2 NOR-Flash (8-bit) → VDDIO3
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XSPIM_P1 PSRAM (16-bit) → VDDIO2
The OTP124 bits reflect the I/O domains voltage levels, as shown in the reference manual’s table:
On the firmware level, the PWR_SVMCR3.VDDIOxVRSEL register bits must reflect bits of OTP word 124, so the following sequence must be done before using VDDIO2 I/Os:
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If VDDIO2 is independent from VDD:
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a) Enable the VDDIO2VM by setting VDDIO2VMEN in PWR_SVMCR3.
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b) Wait for the VDDIO2VM wake-up time.
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c) Wait until VDDIO2RDY is set in PWR_SVMCR3.
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d) Optional: Disable the VDDIO2VM for consumption saving.
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e) If VDDIO2 is in the 1.8 V range: Set the VDDIO2 voltage range by setting VDDIO2VRSEL in PWR_SVMCR3.
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Set VDDIO2SV in PWR_SVMCR3 to remove the VDDIO2 power isolation.
The same sequence must be done for the VDDIO3 I/Os, using the proper bits within the same register.
2. OTP fuse programming
The board should be in Dev Mode to allow it to connect to the STM32CubeProgrammer and program the board. To ensure that the board is in Dev Mode, follow these steps:
- Set the BOOT configuration to DEV BOOT by setting BOOT0 to LOW and BOOT1 to HIGH.
- Connect the USB Type-C® cable to your PC.
Once connected to the USB, open STM32CubeProgrammer and click [Connect]:
Now, go to the OTP tab and click on the [Read] button to refresh all values.
After that, edit the OTP124 (HCONF1) to be 0x0001 8000, setting the HSLV_VDDIO3 (bit 15) and HSLV_VDDIO2 (bit 16) to 1.
Click on [Apply] to update the OTPs modification.
That concludes our example for STM32CubeProgrammer portion. Now, you can read again the OTPs to verify if the OTP124 has changed.
The same process can be performed via firmware. An example is provided as part of the STM32N6 HAL driver.
The last step that is needed, after performing the OTP change, is to ensure that the firmware can leverage the change. This can be done with a few function calls:
/* Set PWR configuration for IO speed optimization */
__HAL_RCC_PWR_CLK_ENABLE();
HAL_PWREx_EnableVddIO3();
HAL_PWREx_ConfigVddIORange(PWR_VDDIO3, PWR_VDDIO_RANGE_1V8);
HAL_PWREx_EnableVddIO2();
HAL_PWREx_ConfigVddIORange(PWR_VDDIO2, PWR_VDDIO_RANGE_1V8);The template for the Discovery kit implements the OTP check. It is followed by the clock configuration to reach the maximum frequency of the external memory (200 MHz) and configure the VDDIO3 to 1.8 V. This example can be found here: STM32CubeN6/Projects/STM32N6570-DK/Templates/Template_FSBL_XIP at main · STMicroelectronics/STM32CubeN6 , specifically under the stm32n6xx_hal_msp.c file, in the function HAL_XSPI_MspIni().
Conclusion
In this article, we explored how to program the OTP fuses in STM32N6 microcontrollers, specifically focusing on OTP124 bits 15 and 16, which are responsible for VDDIO3 and VDDIO2, respectively. By adjusting the hardware to the specific voltage settings and constraints, it is possible to ensure optimal performance and reliability of your embedded applications.
