Introduction
When working with the STM32H5 series microcontrollers, understanding the behavior of reading unwritten One-Time Programmable (OTP) or flash high-cycle area data is crucial. This article addresses the feasibility and implications of such read operations.
1. Error detection and reporting
According to RM0481 section 7.3.4, if the application reads an OTP data or flash high-cycle data not previously written, a double ECC error is reported and only a word full of set bits is returned. The ECC correction reports a double-error detection (ECCD) and ECCD implies an NMI raised.
2. Handling ECC errors
To handle ECC errors, the solution involves checking inside the NMI handler whether the error is a real data error or an access error due to uninitialized memory.
By reading the value of the FLASH_ECCDR register, the handler can determine the nature of the error. If the memory is empty, the ECC error is due to access to uninitialized memory, and the ECCD flag should be cleared. If the error is a true data failure, appropriate error handling should be implemented.
Below is an example of an NMI handler for this scenario:
void NMI_Handler(void)
{
if((FLASH->ECCDR && 0xFF))
{
//the memory is empty
//ECC error due to access to uninitialized memory
//Clear the ECCD flag
FLASH->ECCDETR |= (1<<31);
}
else
{
//ECC error detected a true failure
while (1)
{
}
}
}
3. Important notes
- It is mandatory to clear ECCC or ECCD flags before starting a new read operation.
- For regions where caching is not practical (OTP, RO, data area), the memory protection unit (MPU) must be used to disable local cacheability.
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