Maximum FIFO size with the OCTOSPI interface
The FIFO is sized into the targeted product, typically either 32 or 64 bytes depending on the product. Refer to the reference manual to check the maximum size in the "FIFO and data management" section.
Configuring the FIFO threshold with the OCTOSPI interface in indirect mode
The FIFO threshold informs about the FIFO level and can generate an interrupt to trigger read/write operations, freeing the CPU for other tasks before a burst read/write access.
The FIFO threshold must be configured to align with the size of the burst to read or to write data.
If the burst size is 16 bytes, the FIFO threshold should be set to 16 bytes.
- In the read operation, when the FIFO accumulates 16 bytes of data, it triggers an interrupt or a DMA transfer to read the data.
- In the write operation, the FIFO threshold should be set to ensure that there is at least 16 bytes of space available. When there is enough space, it triggers an interrupt or a DMA transfer to write the data.
Notes
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FIFO threshold and DMA generation are meaningful in the indirect mode, as documented in the reference manual.
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The FIFO threshold state is provided in OCTOSPI_CR and in OCTOSPI_SR registers.
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The FIFO threshold triggers DMA if DMAEN = 1 in the OCTOSPI_CR register.
Key recommendation
Set the FIFO threshold to half of the FIFO size buffer to ensure that there is always sufficient space in the FIFO for receiving or sending a new burst of data.
