How should a correct Linker script for STM32WB55CCUX_FLASH.ld be configured?

[Nick.5706944399077214E12]

I am trying to reconfigure the BLE_HID application to the smallest STM32WBCC processor.

The linker script for BLE_Hid example with STM32WBRG which look like this ( stm32wb55xx_flash_cm4.ld)

/* Highest address of the user mode stack */

_estack = 0x20030000;  /* end of RAM */

/* Generate a link error if heap and stack don't fit into RAM */

_Min_Heap_Size = 0x400;   /* required amount of heap */

_Min_Stack_Size = 0x1000; /* required amount of stack */

/* Specify the memory areas */

MEMORY

{

FLASH (rx)         : ORIGIN = 0x08000000, LENGTH = 512K

RAM1 (xrw)         : ORIGIN = 0x20000004, LENGTH = 0x2FFFC

RAM_SHARED (xrw)      : ORIGIN = 0x20030000, LENGTH = 10K

}

_______________________________________________________________

I tried this (STM32WBCC has SRAM1=64KB )

/* Highest address of the user mode stack */

_estack = 0x20010000;  /* end of RAM */

/* Generate a link error if heap and stack don't fit into RAM */

_Min_Heap_Size = 0x400;   /* required amount of heap */

_Min_Stack_Size = 0x1000; /* required amount of stack */

/* Specify the memory areas */

MEMORY

{

FLASH (rx)         : ORIGIN = 0x08000000, LENGTH = 256K

RAM1 (xrw)         : ORIGIN = 0x20000004, LENGTH = 0xFFFC

RAM_SHARED (xrw)      : ORIGIN = 0x20010000, LENGTH = 10K

}

[Remi QUINTIN]

​The STM32WBCC line is only having 256 KB Flash memory compare to the others. So you should only change parameters related to sections located in Flash memory.

So only FLASH (rx)  : ORIGIN = 0x08000000, LENGTH = 256K is relevant as a required change. Keep the other parameters the same as the SRAM size remains the same.

[Nick.5706944399077214E12]

Thanks Remi I'm still little bit confused. The datasheet (DS11929 Rev 4) on page 13 says SRAM1 is 64KB for 256KB devices.

The RAM1 LENGTH = 0x2FFFC corresponds more to the larger devices with SRAM1 =192KB.

[Remi QUINTIN]

You're right. I forgot this reduced RAM size for the SRAM1.

RAM1 (xrw)         : ORIGIN = 0x20000004, LENGTH = 0xFFFC => is correct.

As a consequence RAM_SHARED (xrw)      : ORIGIN = 0x20010000, LENGTH = 10K should be correct too though I have some doubt about the possible contiguity of the SRAM2 in this configuration.

As I do not have any 256KB device on my side, I cannot test those addresses in a linker file.

So I would recommend to use what you proposed and if it does not work, just change

FLASH (rx)         : ORIGIN = 0x08000000, LENGTH = 256K

RAM1 (xrw)         : ORIGIN = 0x20000004, LENGTH = 0xFFFC

Keep the _estack address and the RAM_SHARED memory area address the same as for a 1MB Flash HW configuration.

[Remi QUINTIN]

​I got the final confirmation about the expected memory region addresses.

SRAM2 and SRAM1 memories are not contiguous for the 256 KB Flash line (see below)

Dory 1M

           STM32WB55xG 1MB Flash, 192KB SRAM1 @0x2000 0000, 64 KB SRAM2 @0x2003 0000

           STM32WB55xE 512KB Flash, 192KB SRAM1 @0x2000 0000, 64 KB SRAM2 @0x2003 0000

           STM32WB55xC 256KB Flash, 64KB SRAM1 @0x2000 0000, 64 KB SRAM2 @0x2003 0000 (non continues RAMS)

           STM32WB50xG 1MB Flash, 64KB SRAM1 @0x2000 0000, 64 KB SRAM2 @0x2003 0000 (non continues RAMS)