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CubeMX STM32WB55 linker file problem?

DrMotor
Associate

Hi, can someone please check what is wrong here: 

CubeMX/CubeIDE generates an STM32WB55 linker/memory map that places 
.MB_MEM2 in an SRAM2 region that bus-faults after the installed wireless stack reserves/protects SRAM2. A manually adjusted linker script placing MB_MEM1/.MB_MEM2 at 0x20038000 works.  

Observed: 

Generated/bad .MB_MEM2: 0x200301E4..0x20030A67

Edited/Working .MB_MEM2: 0x200381BC..0x20038A3F

 

The CubeMX-generated .ld file gives this fault:
HardFault before main()
CFSR = 0x00000400 = IMPRECISERR
Stacked PC = 0x080048CE, inside LoopCopyDataInit
R0/R1/R2 match .MB_MEM2 copy bounds

 

Attached .map .ld  .ioc

STM32_Programmer_CLI.exe -c port=SWD freq=1000 mode=HOTPLUG -fusgetstate
-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------

ST-LINK SN : X
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.30V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x495
Revision ID : Rev Y
Device name : STM32WB5x/35xx
Flash size : 1 MBytes
Device type : MCU
Device CPU : Cortex-M4
BL Version : 0xD5
Debug in Low Power mode enabled

 

> STM32_Programmer_CLI.exe -c port=SWD freq=1000 mode=HOTPLUG -fusopgetversion
-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------

ST-LINK SN : X
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.30V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x495
Revision ID : Rev Y
Device name : STM32WB5x/35xx
Flash size : 1 MBytes
Device type : MCU
Device CPU : Cortex-M4
BL Version : 0xD5
Debug in Low Power mode enabled

FUS Operator Version : v1.f.b

 

> STM32_Programmer_CLI.exe -c port=SWD freq=1000 mode=HOTPLUG -ob displ
-------------------------------------------------------------------
STM32CubeProgrammer v2.20.0
-------------------------------------------------------------------

ST-LINK SN : X
ST-LINK FW : V2J47S7
Board : --
Voltage : 3.30V
SWD freq : 950 KHz
Connect mode: Hot Plug
Reset mode : Software reset
Device ID : 0x495
Revision ID : Rev Y
Device name : STM32WB5x/35xx
Flash size : 1 MBytes
Device type : MCU
Device CPU : Cortex-M4
BL Version : 0xD5
Debug in Low Power mode enabled


UPLOADING OPTION BYTES DATA ...

Bank : 0x00
Address : 0x58004020
Size : 96 Bytes

 

Bank : 0x01
Address : 0x58004080
Size : 8 Bytes


OPTION BYTES BANK: 0

Read Out Protection:

RDP : 0xAA (Level 0, no protection)

BOR Level:

BOR_LEV : 0x0 (BOR Level 0 reset level threshold is around 1.7 V)

User Configuration:

nBOOT0 : 0x1 (nBOOT0=1 Boot from main Flash)
nBOOT1 : 0x1 (Boot from code area if BOOT0=0 otherwise system Flash)
nSWBOOT0 : 0x0 (BOOT0 taken from the option bit nBOOT0)
SRAM2RST : 0x0 (SRAM2 erased when a system reset occurs)
SRAM2PE : 0x1 (SRAM2 parity check disable)
nRST_STOP : 0x1 (No reset generated when entering the Stop mode)
nRST_STDBY : 0x1 (No reset generated when entering the Standby mode)
nRSTSHDW : 0x1 (No reset generated when entering the Shutdown mode)
WWDGSW : 0x1 (Software window watchdog)
IWDGSTDBY : 0x1 (Independent watchdog counter running in Standby mode)
IWDGSTOP : 0x1 (Independent watchdog counter running in Stop mode)
IWDGSW : 0x1 (Software independent watchdog)
IPCCDBA : 0x0 (0x0)

Security Configuration Option bytes - 1:

ESE : 0x1 (Security enabled)

PCROP Protection:

PCROP1A_STRT : 0x1FF (0x80FF800)
PCROP1A_END : 0x0 (0x8000800)
PCROP_RDP : 0x1 (PCROP zone is erased when RDP is decreased)
PCROP1B_STRT : 0x1FF (0x80FF800)
PCROP1B_END : 0x0 (0x8000800)

Write Protection:

WRP1A_STRT : 0xFF (0x80FF000)
WRP1A_END : 0x0 (0x8000000)
WRP1B_STRT : 0xFF (0x80FF000)
WRP1B_END : 0x0 (0x8000000)
OPTION BYTES BANK: 1

Security Configuration Option bytes - 2:

SFSA : 0xC7 (0x80C7000)
FSD : 0x0 (System and Flash secure)
DDS : 0x1 (CPU2 debug access disabled)
C2OPT : 0x1 (SBRV will address Flash)
NBRSD : 0x0 (SRAM2b is secure)
SNBRSA : 0xA (0x2003A800)
BRSD : 0x0 (SRAM2a is secure)
SBRSA : 0x2 (0x20030800)
SBRV : 0x31C00 (0x20000000)




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