Like a few others on the STM32H7 line I as seeing some weird behavior with ACTVODSRDY.
This happens with both the demo projects and my own code.
Sometimes when I power up this board ACTVODSRDY = 1and PWR control register 3 (PWR_CR3) is in the expected startup state for the STM32H735 - See reference manual RM0468 Rev 2 page 236 Table 30.
Other times I power up the board and ACTVODSRDY = 0and no specific pattern will get it out of this mode. I can use SW1 to try to power up in system mode and still ACTVODSRDY stays 0
There seems to be no pattern to get ACTVODSRDY back to a 1, but eventual I can get it back there and it stays that way for a while. I try everything from power cycling the board and re-flashing. I even removed the LCD screen temporarily with no luck. Getting it back just seems "random"
According to the Discover Kit Info this, board power directly supplied from the SMPS step-down converter
There are a few things in the reference manual that concern me as to what this really means.
looking in the RM (Figure 21 , page 239) I see this figure
Specifically it says at the bottom
"1. In Run* mode, write operations to RAM are not allowed."
This statement does not clarify what RAM it refers to. SRAM, ITCM, DTCM, AXI RAM, All of the above?
Nearly every reset handler uses RAM before these the power supply configuration happens.
It this configuration something that should be happening in the reset handler before the standard RAM interactions there? I do not see evidence of this in any STM examples, but this chart seems to imply that.
From the power up sequence
As long as ACTVOSRDY indicates that voltage levels are invalid, the system is in Run* mode, write accesses to the RAMs are not permitted and VOS must not be changed.
Its unclear what happens if the software attempts to write to RAM.
I also wonder if somehow this is getting triggered
Programming data corresponding to an invalid combination of SDLEVEL, SDEXTHP, SDEN, LDOEN and BYPASS bits (see Table 30) will be ignored: data will not be written, the written-once mechanism will lock the register and any further write access will be ignored. The default supply configuration will be kept and the ACTVOSRDY bit in PWR control status register 1 (PWR_CSR1) will go on indicating invalid voltage levels. The system must be power cycled before writing a new value.
As I can not write to LDOEN to disable it when I get stuck in this mode.
Any thoughts or guidance would be helpful.
