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Zero Jitter ISR for STM32F051

Posted on August 05, 2013 at 17:00


On STM32F051 I am trying to implement zero jitter interrupt servce routine for TIM6. I understand in Cortex-M0 architecture, there is a way to set higher IRQ latency to achieve zero jitter. I am not able to locate the registers for this value in STM32F051. I am not sure if the feature is implemented by ST.

Can somebody guide me. Thank you

Posted on August 05, 2013 at 17:43

Higher latency?

The NVIC should allow you to program a priority level associated with an interrupt, and this should allow one interrupt to preempt another.

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