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SVC_Handler fails badly - hardfaults

denis
Associate II
Posted on September 06, 2013 at 19:20

Below is the code for asm SVC handler straight from an example by ARM:

SVC_Handler

    STMFD        sp!,{r0-r3,r12,lr}          ; Store registers.

  LDR          r0,[lr, #4]                        ; Calculate address of SWI instruction and load it into r0.

    BIC          r0,r0,#0xff000000                ; Mask off top 8 bits of instruction to give SWI number.

    ;

    ; Use value in r0 to determine which SWI routine to execute.

    ;

    LDMFD        sp!, {r0-r12,pc}                    ; Restore registers and return.

  END                            ; Mark end of this file.

And i get Hard Fault failure on LDR instruction . wtf..  Any ideas?

I've seen same code sequence in many examples of the same SVC handler, and in other code.

10 REPLIES 10
Posted on September 29, 2015 at 22:40

Newer, link, will also attach

https://www.arm.com/files/pdf/Cortex-M3_programming_for_ARM7_developers.pdf

________________

Attachments :

Cortex-M3_programming_for_ARM7_developers.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0f1&d=%2Fa%2F0X0000000bc3%2FRUGmYAkA401NmoX7ETYz1My.x4kbylFjjhjQK6RNYOk&asPdf=false
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