2025-10-27 3:09 PM - edited 2025-10-27 3:14 PM
Hello,
I'm using the STM32N657 processor and have the HEXASPI device running at 1.8V.
VDDIO2 is connected to 1V8 supply (which affects: PO[5..0] and PP[15..0]
The FMC is placing the A23 line on pin PO1 (this is the only option for the FMC-A23) and the FMC device is running at 3.3V. Can I place a pullup to 3.3V on PO1, or will this affect/blow the GPIO connected to 1.8V -OR- do I need to place a voltage translator on that pin?
Solved! Go to Solution.
2025-10-28 1:25 AM - edited 2025-10-28 1:43 AM
Hi @matt-crc
As explained in DS14791 Rev7:
Absolute Maximum ratings (value never to be reached) Table 21. Voltage characteristics. On a TT GPIO in 1.8V HSLV mode (corresponding to programmed OTP124 HCONF and VDDIOxVRSEL = 1) the max VIN voltage = 1.98V
Table 24. General operating conditions, VIN when I/O TT_xx in the 1.8V range, max = min VDD + 0.3V.
You do not indicate the package you are using. On the VFBGA264, you have the FMC_A23 option on PB3 or PD1.
Best regards,
Romain
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2025-10-27 11:41 PM
Hi,
You cannot pull up a fast output line to another level, the internal protection diodes would prevent it. And you probably want a fast signal here, nothing slow with pullups. So take maybe a single gate as a level shifter for getting a fast output signal.
2025-10-28 1:25 AM - edited 2025-10-28 1:43 AM
Hi @matt-crc
As explained in DS14791 Rev7:
Absolute Maximum ratings (value never to be reached) Table 21. Voltage characteristics. On a TT GPIO in 1.8V HSLV mode (corresponding to programmed OTP124 HCONF and VDDIOxVRSEL = 1) the max VIN voltage = 1.98V
Table 24. General operating conditions, VIN when I/O TT_xx in the 1.8V range, max = min VDD + 0.3V.
You do not indicate the package you are using. On the VFBGA264, you have the FMC_A23 option on PB3 or PD1.
Best regards,
Romain
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2025-10-28 5:24 AM
Hi @RomainR.
1- yes it is the VBGA264 STM32N657X0H3Q
2- FMC-A23 is not available on A14-PD1, F13-PB3, or T17-PN2. I attached the .ioc file if you wanted to see it.
3- I want to run the FMC at 200MHz with the address setup time = 1 cycle. I'm not sure if a voltage converter will skew address decoding (if that is the only address line going to a voltage translator).
At this point, I'm debating if i should just remove A23 all together from the design... sigh
4- Can you confirm that on the N657, the FMC can run at 200MHz? All I found in the reference manual was a transfer rate of 800Mbytes/sec on the FMC.
thanks, Matt
2025-10-28 5:46 AM
Forget any fiddling at these speeds with pull-ups, and - what you said - even level converters might have a too high propagation delay, unless all signals are going through similar devices - which would probably take too much space.
So better change the MCU package - or as you said, check if you can remove A23.
2025-10-28 6:16 AM
Hi @matt-crc
You have assigned PB3 and PD1 for other FMC signals in your .ioc (FMC_A7 and MC_FBL1)
This is why you cannot use them for FMC_A23.
But it is available in AF14 as explained in Table 20. Alternate functions: AF8 to AF15
The FMC timing can be found in DS14791 Rev7 in 5.3.19 FMC characteristics where all timing
are based on Tfmc_ker_ck = fmc_ker_ck
If you refer to RM0486 in Table 73. Peripheral clock distribution summary (continued) indicates
max kernel clock FMC = 200MHz
You already use the biggest package. You must choose between XSPI or FMC, both seem not a possible use case.
Best regards,
Romain,
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