STM32L151 stack width

[nanayakkaraan]

Posted on April 19, 2012 at 11:43

Dear all,

What is the stack width of STM32L151r8? Thank you

[frankmeyer9]

Posted on April 19, 2012 at 11:58

Not sure what you mean.

The stack is placed in RAM, and is 32 bit wide in an 32 bit architecture like CM3. The stack size is purely a property of your toolchain / application, as it is just some reserved RAM, with the stack pointer pointing to the begin.

[nanayakkaraan]

Posted on April 20, 2012 at 05:46

Hi,

Thanks for replying. But I am still having my confusion. It is true that STM32L is a 32 bit micro controller. But if I am having the following definition in my linker configuration file, define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { }; alignment = 8 means, I am aligning my stack to 8 bytes. Is that mean my stack width is 8 bytes? Any clarifications regrading this will be highly appreciated. Thank you.

[frankmeyer9]

Posted on April 20, 2012 at 09:09

An alignment of 8 means that the stack begins at an address which is a multiple of 8. This is no architectural constraint, because most of the data handled with the stack are 32 bit.

This 8 byte alignment is a requirement for the ARM architecture ABI. It is assumed to make object files / libraries easily exchangable, i.e., you can link in a libraries compiled with a different toolchains. Suggested reading: AppsNote179.pdf and IHI0046B_ABI_Advisory_1.pdf from

http://infocenter.arm.com

[nanayakkaraan]

Posted on April 20, 2012 at 13:57

Hi fm,

Thanks for your reply and the given resource links. I will go through it. This means the stack width (stack word size) of STM32L is 4 bytes or 32 bit. Thank you.

[Tesla DeLorean]

Posted on April 20, 2012 at 14:27

Unless you intentionally break the alignment playing with the SP, the push/pop will keep the alignment at 32-bits.