Posted on June 24, 2013 at 05:11Hello, guys
I'm working on a stm32f407 chip and I wanna implement the I2C communication with it. But I have encountered some problems.
The following describes my configuration about I2C:
Enable clock for GPIOB and I2C.
Remap I2C1 port to PB6, PB7
PB6, 7 are configured in AF mode, open-drain, 50MHz output speed.
I2C clock input is equal to APB1: 42MHz
I2C_InitStruct.I2C_Mode = I2C_Mode_I2C;
I2C_InitStruct.I2C_DutyCycle = I2C_DutyCycle_2;
I2C_InitStruct.I2C_OwnAddress1 = 0x0A; //Master address
I2C_InitStruct.I2C_Ack = I2C_Ack_Enable;
I2C_InitStruct.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; //7 bit address mode
I2C_InitStruct.I2C_ClockSpeed = 100000; // speed = 300K
At last, the I2C peripheral is enabled.
After these configuration, I was able to generate a start condition, and the status register is right.
However, when I was trying to send the 7-bit slave address with bit0=0 (indicating a write operation according to EEPROM manual), the two status register value is 0x00070080. Only the BUSY, MSL, TRA,TxE bits are set. The ADDR bit is still keeping as 0.
I don't know why the ADDR keeps reset, when the status of AF and TxE is right. I think a rights status of AF and TxE means a successful sending of address. Then what's wrong with the ADDR bit?
Will anybody give me some advice about the possible reason for it? I have been stuck here for several days.
Thank you!
Wenlong Li
#stm32 #i2c #cm4 #addr-bit
