2014-03-26 03:36 AM
Guys,
Does R/B pin on Nand flash needed on the software ? I can't find R/B pin on GPIO definition, Anyone knows ? thanks #nand2014-03-26 03:48 AM
which device ?
STM32F4 support busy line in FSMC peripheral read RM0090 par. 36.6 Nand flash/PC card controller thebusy signal is called NWAIT for STM32F4 devices PD6 alternate function pin2014-03-26 06:45 AM
Connect the Ready/Busy pin to an EXTI interrupt pin. Use it to time long operations like block erase, where it generates an interrupt when the operation completes (busy to ready edge). That way you can do something else while NAND is busy and not have to poll it.
Jack Peacock2014-03-26 07:21 PM
void
FSMC_NAND_Init(
void
)
{
GPIO_InitTypeDef GPIO_InitStructure;
FSMC_NANDInitTypeDef FSMC_NANDInitStructure;
FSMC_NAND_PCCARDTimingInitTypeDef p;
/* Enable FSMC, GPIOD, GPIOE and AFIO clocks */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOG | RCC_APB2Periph_AFIO , ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* CLE, ALE, D0->D3, NOE, NWE and NCE2 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15 |
GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* D4->D7 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* NWAIT NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* INT2 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_SetupTime = 0xf1;
p.FSMC_WaitSetupTime = 0xf2;
p.FSMC_HoldSetupTime = 0xf3;
p.FSMC_HiZSetupTime = 0xf1;
FSMC_NANDInitStructure.FSMC_Bank = FSMC_Bank2_NAND;
FSMC_NANDInitStructure.FSMC_Waitfeature = FSMC_Waitfeature_Enable;
FSMC_NANDInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
FSMC_NANDInitStructure.FSMC_ECC = FSMC_ECC_Enable;
FSMC_NANDInitStructure.FSMC_ECCPageSize = FSMC_ECCPageSize_512Bytes;
FSMC_NANDInitStructure.FSMC_TCLRSetupTime = 0xa1;
FSMC_NANDInitStructure.FSMC_TARSetupTime = 0x15;
FSMC_NANDInitStructure.FSMC_CommonSpaceTimingStruct = &p;
FSMC_NANDInitStructure.FSMC_AttributeSpaceTimingStruct = &p;
FSMC_NANDInit(&FSMC_NANDInitStructure);
/* FSMC NAND Bank Cmd Test */
FSMC_NANDCmd(FSMC_Bank2_NAND, ENABLE);
}
2014-03-26 07:39 PM
READY/BUSY/WAIT - Many NAND drivers will spin on the GPIO read status.
2014-03-26 07:45 PM
2014-03-27 04:08 AM
which one is R/B ?
I don't have PG6, could it be PD6 ? what's PG6 for then ?? I attached the schematic and Nand Flash chip datasheet, what do you reckon ? thanks
/* NWAIT NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* INT2 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_Init(GPIOG, &GPIO_InitStructure);
________________
Attachments : K9F1G08U0D.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0wq&d=%2Fa%2F0X0000000bg3%2F1snGM9FK.d3aGyQik0aCT9ESdK6HN.fzENTxZSRrVmc&asPdf=falseNandFlash_Board_A_.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0wl&d=%2Fa%2F0X0000000bfz%2FLrERvL_7wmWHy2O7_GS_DRzeiO.AG4.TfZAVdJQjOT4&asPdf=false
2014-03-27 05:49 AM
FFS it's the WAIT pin, in this case a GPIO Input on PD6, providing a BUSY (B) or READY (R) signal. It's presumably a GPIO because the signal is not sufficiently compatible with the FSMC, or that's it's not appropriate to stall the CPU waiting for a slow memory device.
The interrupt mode would only be appropriate if you have some stateful implementation2014-03-27 05:59 AM
2014-03-28 05:50 AM
am I defining the pin on code into the board correctly ? Please have a look on the code :
/* CLE, ALE, D0->D3, NOE, NWE and NCE2 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15 |
GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
CLE = PD11
ALE = PD12
D0 = PD14
D1 = PD15
D2 = PD0
D3 = PD1
NOE = PD4 = RE ? <==On NAND Flash board
NWE = PD5 = WE ? <==On NAND Flash board
NCE2= PD7 = CE ? <==On NAND Flash board
/* D4->D7 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* NWAIT NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(GPIOD, &GPIO_InitStructure);
D4 = PD7
D5 = PD8
D6 = PD9
D7 = PD10
NWAIT = PD6 = R_B ? <==On NAND Flash board