Regarding Controlling of DAC in STM32F303

[Kye-Hyun Park]

Hello

I'm trying to implement 4-20mA output using DAC CH1. I found out a strange phenomenon during the experiment for the DAC output test.

the issue has at both non-triggered mode and software trigger mode of DAC.

[phenomenon]

I found that the DAC output is being held at system reset via nRST pin control. Additionally, DAC output is being held even if CPU changed stopped state by a breakpoint in IAR compiler

[Question]

Question 1) Does the DAC outputs continually regardless of the CPU state?

Question 2) Does the DAC output turn off immediately when the system reset is forced during DAC output? or Does DAC output turn off slowly during some time delay?

Could you please share any information for the issue?

Thank you

Kye-Hyun Park

[Uwe Bonnes]

I guess your DAC output has a capacitor to ground and a high impedance external output buffer. That way, if the DAC output gets reset, there is no reasonable discharge path and the capacitor keeps its voltage for a long time only decaying very slow.