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Questions regarding STM32U5 Flash endurance

cfl
Associate

Hello,

I am working on a project where I need to both read and write regularly into the STM32 flash memory. I have some concerns and questions regarding its endurance.

First off, I posted a question not long ago about writing to FLASH using ST EEPROM library. I was wondering why upon writing to a variable, it did not effectively write it into flash. This is essentially due to how the library itself works. Hence why I can not really use it to manage flash wearing, because I need the writing to happen precisely when I call a write function due to the fact that my product can be power off at any moment.

So going back to the reference manual RM0456, I came upon section 7.3.8 which states:

"Each flash memory page can be written and erased 10 000 or 100 000 times. A maximum of
32 pages (256 Kbytes) per bank feature this increased endurance of 100 kcycles. This
enhanced endurance can be used for data storage that usually needs more intensive
cycling capability than code storage.
Any flash page can be chosen to be cycled up to 100 kcycles. As soon as a page is above
10 kcycles, it is considered as high cycling page (even if not yet at 100 kcycles). The
application must take care not to exceed 32 pages cycled more than 10 000 times."

 

This paragraph makes me wonder about a few things:

  • What kind of FLASH memory is embedded into the STM32U5 (NOR or NAND) ?
  • What is the reason for the wearing of FLASH ? Is it writing into the FLASH or is it erasing it (mass erase or page erase) ? For instance, does writing only 0 into the flash wear it ?
  • What is ST's recommended way to deal with flash wearing ? How does one tell the flash controller to configure a page do be cycled up to 100k cycles rather than 10k ? Is it through an option byte in flash registers ? Is it something else ? Is there a library that handle FLASH wearing ?

Thanks in advance

 

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